
	Where results make sense

Topic: 65 nanometer

Related Topics

65 BC

Interstate 65

AGM 65 Maverick

STS 65

65 number

Arado Ar 65

1964 65

Type 65

AIM 65

USS Wake Island CVE 65

Type 65 torpedoes

Eiffel 65

In the News (Sat 26 May 12)

EXECUTIVE POWER

Iran

ANALYSIS

Pakistan

Family compact

	65 nanometer - Wikipedia, the free encyclopedia
		The 65 nanometer (65 nm) process is the current most advanced mainstream technology for general semiconductor manufacturing as of 2006.
		65 nanometer refers to the wavelength of the light source used to cure the photoresistive coating on silicon wafers.
		The shorter wavelength yields smaller etched lines and transistors on the silicon wafer, allowing for more transistors per given area, or more processing power for the same area.
	en.wikipedia.org /wiki/65_nanometer (277 words)

	90 nanometer - Wikipedia, the free encyclopedia
		Since 2002 and up to 2004, the 90 nanometer (90 nm) process has been a buzzword in the electronic, the LSI and semiconductor manufacturing, and fabrication industries.
		The industrial standard before this was the 0.13 micrometer (130 nm) process, and the next milestone is the 65 nm process.
		During the manufacturing process, a thin layer of oxide is applied to the silicon wafer, which acts as insulating material to keep electrons inside of the chip's structures.
	en.wikipedia.org /wiki/90_nanometer (499 words)

	65 nanometer: Facts and details from Encyclopedia Topic (Site not responding. Last check: 2007-10-14)
		The 65 nanometer[For more info, click on this link] (65 nm) process is the next milestone in semiconductor manufacturing and fabrication.
		At 65 nm linewidths are extremely small presenting significant problems due to electron transfer between tracks.
		AMD and IBM are yet to release specific details of their joint strategy for the 65 nm process.
	www.absoluteastronomy.com /encyclopedia/6/65/65_nanometer.htm (485 words)

	Geek.com Geek News - The 65 nanometer target
		Intel has produced the first working 65 nanometer SRAM chips (see our coverage, and the first 65 nm tools and lithography equipment are already starting to appear.
		The 65 nm generation may be the last generation in which conventional CMOS transistors can be employed.
		It may well be that general purpose logic won't fit as well into the 65 nanometer design rules, due to power dissipation issues, or just flat out "complexity-at-a-distance" issues.
	www.geek.com /news/geeknews/2003Dec/bch20031202022876.htm (589 words)

	Intel unveils its next generation 65 nanometer chip - Deccan Herald (Site not responding. Last check: 2007-10-14)
		Intel Corp., world’s largest maker of semiconductors, said it has built test chips using next-generation 65 nanometer technology, which would allow the company to put 10 million transistors on the top of a ball point pen.
		The demonstration chips compare to 90 nanometer chips slated to be shipping in volume early next year and 130 nanometer chips that are currently in wide use.
		The 65 nanometer process will enable Intel to double the number of transistors it can put on a single chip from today's chips, the company said.
	www.deccanherald.com /deccanherald/nov27/b6.asp (415 words)

	Comments for: Intel builds its first 65 nanometer chips - ja.zz
		The first samples are simple SRAM chips, but Intel expects to manufacture processors using 65 nanometer process technology in 2005, which would nicely keep the company in line with Moore's Law.
		All this as Intel appears to be struggling to produce chips using 90 nanometer fabrication tech.
		Intel isn't discussing the specifics of its plans to deal with gate leakage in its 65 nanometer chips, but they do acknowledge that leakage gets worse with finer process technologies.
	techreport.com /ja.zz?id=30132 (322 words)

	AMD's 65 nano silicon ready to roll
		The same sources added that AMD has been running preliminary 65 nanometre engineering silicon since June this year.
		We'd expect AMD to be a little behind Intel producing the shrink, but both companies appear to be engaged in a 21st century version of "Beat the Clock".
		AMD is not prepared to discuss which firm is providing it with its 65 nanometre tools.
	www.theinquirer.net /?article=25910 (209 words)

	Geek.com Geek News - VLSI symposium describes 65 nanometer transistors
		The 65 nanometer node is scheduled for 2006, although Intel is planning on introducing 65 nanometer chips in 2005.
		Chipmakers may have great difficulty keeping the power requirements/heat dissipation of 65 nm chips within acceptable limits, and they will probably have to make extensive use of silicon-on-insulator technology and fully-depleted substrates.
		This approach may result in 65 nanometer chips that have acceptable power consumption and heat dissipation.
	www.geek.com /news/geeknews/2004Mar/bch20040421024850.htm (1566 words)

	Intel claims it's mastered 65 nano technology
		The 65 nano chips use a second gen version of Intel's strained silicon, copper interconnect, and low-k dielectrics.
		According to Sunlin Chou, general manager of Intel's technology group, the 65 nano process extends the life of Moore's Law.
		The proof of concept chips are being made at Intel's 12-inch D1D development fab in Hillsboro, in the state of Oregon.
	www.theinquirer.net /?article=12834 (219 words)

	TI to sample 65-nanometer chips in early 2005 \| InfoWorld \| News \| 2004-03-22 \| By Nancy Weil, IDG News Service
		The smallest track or gap width on a chip surface is measured in nanometers.
		A lower nanometer measurement means that semiconductors can be made that are physically smaller, and they also are faster, more powerful and efficient because more transistors can be packed into the smaller space.
		Sixty-five nanometers is roughly a thousandth of the width of a single human hair, which is about half the width of 90 nanometers.
	www.infoworld.com /article/04/03/22/HNtisixtyfive_1.html (1401 words)

	65nm Technology from Intel
		Beginning in the second half of 2006, Intel will begin shipping dual-core processors based on Intel®; next generation microarchitecture — (codename) Merom for mobile platforms, (codename) Conroe for desktops platforms and (codename) Woodcrest for server platforms, all on 65nm process technology.
		As transistors get smaller (a nanometer is one-billionth of a meter), more power and heat dissipation issues develop.
		Intel's 65nm transistors have a reduced gate length of 35 nanometers and a gate oxide thickness of 1.2 nanometers, which combine to provide improved performance and reduced gate capacitance.
	www.intel.com /technology/silicon/65nm_technology.htm (1082 words)

	Infineon Develops 65 Nanometer Cell Phone Chip » Telecommunications Industry News
		German chipmaker, Infineon revealed last Friday that it has successfully completed trial of its new 65 nanometer chip for mobile phones.
		Chipmakers are constantly striving to create smaller and smaller chips, in their quest to build smaller, cheaper, and more advanced mobile devices.
		Infineon is the second company, after San Diego-based Qualcomm, to successfully develop a 65 nanometer cell phone chip.
	www.teleclick.ca /2006/05/infineon-develops-65-nanometer-cell-phone-chip (174 words)

	Technology News: Processors : Intel Pushes 65-Nanometer Manufacturing Process
		08/30/04 10:55 AM PT Intel said transistors in its new 65-nanometer process will have gates measuring only 35 nanometers, which are 30 percent smaller than the length of the on-off switches in the 90-nanometer process.
		Intel said transistors in its new 65-nanometer process will have gates measuring only 35 nanometers, which are 30 percent smaller than the length of the on-off switches in the 90-nanometer process.
		Analysts agreed that the difficulty of shifting to smaller transistors and larger complexity showed when Intel transitioned to the 90-nanometer process.
	www.technewsworld.com /story/36234.html (1014 words)

	CIOL : News : Intel touts next-generation test chips (Site not responding. Last check: 2007-10-14)
		Said it has built test chips using next-generation 65 nanometer technology and expects to be the first to produce them, in 2005.
		SAN FRANCISCO: Intel Corp., the world's largest maker of semiconductors, said it has built test chips using next-generation 65 nanometer technology and expects to be the first to produce them, in 2005.
		The transistors on the Static Random Access Memory (SRAM) test chips are so small that 10 million of them would fit in one square millimeter, roughly the size of the top of a ball point pen, according to the Santa Clara, California-based company.
	www.ciol.com /content/news/2003/103112501.asp (467 words)

	Sony Electronics's media processor(CELL rival) in Press Rele - Beyond3D Forum
		The second phase investment of approximately 120 billion yen will be used to further enhance the fabrication lines with 65 nanometer process on 300 mm wafers.
		Of the 120 billion yen, approximately 53 billion yen will be used to reinforce the fabrication line located in the clean room on the first floor in SCEI's Fab2, for the manufacturing of 65 nanometer generation high-performance LSIs such as "Cell", using SOI process technology.
		As for the investment to Toshiba, combined with the investment executed in the fiscal year 2003, a total of approximately 42 billion yen (second phase investment: approximately 31 billion yen) will be invested by Sony Group to build a 65 nanometer semiconductor facility using DRAM CMOS technology.
	www.beyond3d.com /forum/showthread.php?t=8945 (3281 words)

	JusTech'n - Computer News
		The nanometer figure refers to the average size of features on chips produced with the process.
		Most PC microprocessors on the market today are made on the 130-nanometer process, and manufacturers are just starting to produce 90-nanometer chips now.
		The gate length--the distance electrons travel to get from the source to the drain on a transistor and thereby flip the transistor on--drops from 50 nanometers to 35 nanometers in 65-nanometer chips.
	www.justechn.com /news/news.php?id=143 (266 words)

	ITworld.com - Power cuts key for Intel at 65 nanometers
		Intel Corp.'s 65-nanometer process technology will not be very different from its 90-nanometer process technology, which should help make for a smoother transition between the two manufacturing techniques in 2005, according to a briefing from an Intel manufacturing executive last week.
		A nanometer is one-billionth of a meter, and the 90-nanometer designation refers to the average size of the structures on a chip.
		Intel also reduced capacitance on the transistor gates, which are now 35 nanometers long.
	www.itworld.com /Comp/1128/040830power (891 words)

	Technology News: Cutting Edge : Intel Demonstrates Next-Gen Chip Process
		"The 65 nanometer process will enable us to make better products at lower cost, as we continue to innovate and extend Moore's Law," he said, referring to Gordon Moore, an Intel cofounder who said that the number of transistors on a chip will double every 18 months.
		While Intel is in the middle of a rapid ramp-up of its products from the older 130-nanometer process to the newer 90-nanometer process, the company is also now laying the groundwork for even smaller transistors that would be built with the 65-nanometer process.
		Intel said the transistors made from the 65-nanometer process will actually measure only 35 nanometers in gate length, "which will be the smallest and highest-performing CMOS transistors in high-volume production," the company said.
	www.technewsworld.com /perl/story/32250.html (939 words)

	Kick It Down a Notch: Intel Builds 65-Nanometer-Process SRAMs
		The silicon giant, which used the 65nm process to create prototype 4-megabit SRAMs last November, says it's on track to deliver 65-nanometer-process CPUs in 2005, with 45-nanometer lithography starting production in 2007 and 32-nanometer engineering in 2009.
		Each of the new SRAMs has more than half a billion transistors, with gates or on/off switches measuring 35 nanometers -- approximately 30 percent smaller than those of current 90-nanometer technology.
		Intel adds that about 100 such gates could fit inside the diameter of a human red blood cell, or that 10 million of the new transistors would occupy one square millimeter (think the tip of a ballpoint pen).
	www.cpuplanet.com /news/article.php/3402741 (245 words)

	Chartered, IBM and Infineon Band Together
		Singapore's Chartered Semiconductor (Quote, Chart) on Thursday said it will be involved in the development and manufacturing for a new generation of logic processors with IBM Corp.
		Chartered is connected to the government of Singapore, and under the terms of the five-year deal with U.S. and German companies, the company will be involved in the development of 65 nanometer processes for foundry chip production on 300 millimeter silicon wafers.
		Currently, the smallest chips being commercially manufactured are 90 nanometers in width.
	siliconvalley.internet.com /news/print.php/2246141 (674 words)

	65-Nanometer Process Technology Extends Benefits of Moore's Law
		The achievement extends Intel's efforts to develop new manufacturing process technology every two years, in accordance with Moore's Law.
		The transistors in the new 65-nm (a nanometer is one-billionth of a meter) technology have gates (the switch that turns a transistor on and off) measuring 35 nm, approximately 30 percent smaller than the gate lengths on the earlier 90-nm technology.
		About 100 of these gates could fit inside the diameter of a human red blood cell.
	www.intel.com /technology/silicon/si08042.htm (730 words)

	Integrated circuit - Wikipedia, the free encyclopedia
		The wafers are up to 300 mm in diameter (wider than a common dinner plate).
		Use of 90 nanometer or smaller chip manufacturing process.
		Intel, IBM, and AMD are using 90 nanometers for their CPU chips, and Intel has started using a 65 nanometer process.
	en.wikipedia.org /wiki/Integrated_circuit (3152 words)

	USATODAY.com - Intel demonstrates tiny new computer chip (Site not responding. Last check: 2007-10-14)
		The 65-nanometer milestone is significant because of its tiny size.
		A nanometer is a mere billionth of a meter, meaning 10 million 65-nanometer transistors could fit on the tip of a ball-point pen.
		Intel said the development of the new circuits renews its confidence that Moore's Law, which projects the steady improvement in chip performance, remains in place for at least another 10 years.
	usatoday.com /tech/news/techinnovations/2003-11-24-intel-65nano_x.htm (569 words)

	Intel Drives Moore's Law Forward With 65 Nanometer Process Technology
		The company has built fully functional 70-megabit static random access memory (SRAM) chips with more than half a billion transistors using the world's most advanced 65 nanometer (nm) process technology.
		The achievement extends Intel's effort to drive the development of new manufacturing process technology every two years, in accordance with Moore's Law.
		The transistors in the new 65nm (a nanometer is one-billionth of a meter) technology have gates (the switch that turns a transistor on and off) measuring 35nm, approximately 30 percent smaller than the gate lengths on the previous 90nm technology.
	support.intel.com /pressroom/archive/releases/20040830net.htm (808 words)

	Intel touts next-generation test chips - Tech News & Reviews - MSNBC.com
		SAN FRANCISCO, Nov. 24 - Intel Corp., the world’s largest maker of semiconductors, on Monday said it has built test chips using next-generation 65 nanometer technology and expects to be the first to produce them, in 2005.
		The transistors on the SRAM test chips are so small that 10 million of them would fit in one square millimeter, roughly the size of the top of a ball point pen.
		The transistors on the Static Random Access Memory (SRAM) test chips are so small that 10 million of them would fit in one square millimeter, roughly the size of the tip of a ball point pen, according to the Santa Clara, California-based company.
	www.msnbc.msn.com /id/3607052 (524 words)

	TI sets out for 65 nanometers - Hardware - News - ZDNet Asia
		OMAP processor, by adjusting their voltage based on the demands on the chips.
		The 65-nanometer process "doubles the transistor density over our qualified 90-nanometer production process and positions Texas Instruments for a leadership role in delivering the benefits of 65 nanometer to customers early next year," Hans Stork, TI's chief technology officer, said in a statement.
		"Along with the tremendous increase in functionality TI will offer at 65 nanometers with highly integrated designs, we are taking significant steps to lead the industry in managing the power those designs consume."
	www.zdnetasia.com /news/hardware/0,39042972,39172781,00.htm (599 words)

	PCWorld.com - Intel Revamps Technology
		Power consumption, and the related problem of dissipation, were central to Intel's development of its 65-nanometer manufacturing technology.
		A nanometer is one billionth of a meter, and the specific number attached to a generation refers to the average size of features on the chip.
		Transistors have now gotten so small at the 90-nanometer generation--currently used to build Intel's most advanced chips--that the electrical power used to run the transistors can leak out of the chip as heat.
	www.pcworld.com /resource/article/0,aid,122609,pg,1,RSS,RSS,00.asp (1000 words)

Try your search on: Qwika (all wikis)