The Intel 8259 is a family of Programmable Interrupt Controllers (PICs) designed and developed for use with the Intel 8085 and Intel 8086 8-bit and 16-bit microprocessors.
The 8259 was included in the original PC introduced in 1980 and maintained by the PC/XT when introduced in 1983.
The 8259, though originally a separate chip, is now part of the Southbridge chipset on modern x86 motherboards.
The INT signal (Interrupt--prioritized interrupt) of the second 8259 was connected to the old IRQ2 pin on the first 8259 and the IRQ 2 line was plugged into IRQ 9 on the new 8259.
The old 8-bit bus lives on in the 16-bit ISA expansion slot on your PC, which is really an expanded 8-bit socket with additional pins to bring it to 16-bits in front of it.
Of course, the functions of 8259 have long since be incorporated into the large chipsets on today's motherboards.
The 8259interrupt controller chip is a very complex programmable IC circuit that manages upto 8 different interrupt inputs on the XT and with two cascaded 8259's upto 15 interrupt inputs on the AT type system board.
The 8259 is basically an 8 input priority encoder that has 8 inputs and one output.
As soon as the CPU is finished preserving it's contents, it will signal the 8259interrupt controller chip that it is ready to service the request by putting an active signal on the INTA (interrupt acknowledge) line of the control bus.
The 8259A is an improved version of the 8259 programmable interrupt controller.
This convoluted arrangement finally began to disappear in the late 1990s and early 2000s, initially on multiprocessor systems.
It has been succeeded by Intel's IO-APIC (advanced programmable interrupt controller) standard for PC compatible systems, though IO-APIC systems still emulate an 8259 environment by default and retain a certain level of compatibility while in advanced mode.
A typical PC uses two of these devices to provide 15 interrupt inputs (seven on the master PIC with the eight input coming from the slave PIC to process its eight inputs)[7].
One a specific interrupt occurs, the 8259 masks all further interrupts from that device until is receives an end of interrupt signal from the interrupt service routine.
Bits in the ISR are set after the 8259 activates the processor's interrupt line and the processor has acknowledged an interrupt.
The lower eight bits are from the first 8259 (which handles IRQ0 to IRQ7), and the upper eight bits are from the second 8259 (which handles IRQ8 to IRQ15).
The ISR on the first line is all zeros, which indicates that NT already acknowledged the interrupt with an EOI command to the 8259.
www.ddj.com /184410533 (3176 words)
8259 Programmable Interrupt Controller(Site not responding. Last check: 2007-11-01)
Figure 1 shows the block diagram for the 8259 programmable interrupt controller (PIC) megafunction.
The 8259 PIC is functionally based on the Intel 8259A.
Eight interrupt requests are prioritized for a processor.
[No title](Site not responding. Last check: 2007-11-01)
DO NOT REMOVE THEM as the 'offset' parameter * of 'openpic_init()' does not work for the sandpoint because the 8259 * interrupt is NOT routed to the EPIC's IRQ 0 AND the EPIC's IRQ 0's offset is * the same as a normal openpic's IRQ 16 offset.
Then, when an interrupt on the IRQ that is * shared with the 8259 comes in, we'll take a peek at the 8259 to see * it its generating an interrupt.
This does give the 8259interrupts a higher priority * than the EPIC ones--hopefully, not a problem.
Capron 8259 is a type 6 nylon injection molding graft copolymer developed for fastener applications requiring to abusive impact molding combined with a high level of pullout strength.
It exhibits varying levels of toughness and flexibility combined with thermal and chemical resistance properties provided by the polyamide backbone.
Capron 8259 is generally recommended for fastener applications.
