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| | SOCcentral: Accelerating SOC Design While Reducing Costs |
 | | AES is a new and highly effective technology that accelerates the design process and cuts design costs. |
 | | AES reduces design risks because a designer can quickly learn of all the area, performance, and power options available, and then use AES to quickly design blocks for the specified mix of performance, area, and power. |
 | | AES automates this work, enabling designers to focus on the crucial, high-value elements of SOC development: the right implementation algorithm, system architecture, memory structures, data storage, etc. AES also simplifies physical design with architecture templates designed for fast timing and physical closure. |
| www.soccentral.com /results.asp?entryID=9733 (1969 words) |
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