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Topic: Antifuse

	Crack Microcontroller: Reliability of Antifuse-Based Field Programmable Gate Arrays
		Antifuse based FPGAs are founded on a device (antifuse) that is not based on mainstream technology and therefore the manufacturer of such a part bears a bigger burden in reliability testing than do companies using purely mainstream technologies.
		To verify that this holds true for long times at high temperature, antifuses were stressed at their programming current at 250 C until failure as shown in Figure 6.
		Antifuses proved to be especially susceptible to this as the ONO BVG had to be lower than the gate oxide BVG.
	www.break-ic.com /topics/crack-microcontroller.asp (4036 words)

	Antifuse - Wikipedia, the free encyclopedia
		An antifuse is an electrical device that performs the opposite function to a fuse.
		Antifuse PLDs are one time programmable in contrast to other PLDs that are SRAM based and which may be reprogrammed to fix logic bugs or add new functions.
		Antifuses are also seen in the mini-light (or miniature) style low-voltage Christmas tree lights.
	en.wikipedia.org /wiki/Antifuse (821 words)

	Read-disturb tolerant metal-to-metal antifuse and fabrication method - United States Patent 5,449,947
		In any circuit containing a plurality of antifuses, the antifuse links must be manufactured so as to reliably program at the selected programming voltage and to remain in their user-selected state during the operating life of the circuit of which they are a part.
		An antifuse aperture 20 is formed in inter-metal dielectric layer 18 to expose the upper surface of lower barrier layer 16 (or lower electrode 14 if lower barrier layer 16 is not present) in the region where it is desired to form the antifuse, using conventional photolithography and etching techniques.
		The first antifuse material layer 86, the highly conductive layer 88, the second antifuse material layer 90, and the upper barrier layer 92 are then masked and etched as is well known in the art to form the antifuse stack shown in FIG.
	xrint.com /patents/us/5449947 (6239 words)

	United States Patent: 6,288,437 (Site not responding. Last check: 2007-11-05)
		The antifuse structure of claim 2, wherein the means for moving the second conductive member comprises a material composition including hydrogen in solid solution or in a hydride phase.
		The antifuse structure of claim 2, wherein the means for moving the second conductive member comprises at least one of titanium, hafnium, niobium, tantalum, thorium, vanadium, and zirconium, and hydrogen in solid solution or in a hydride phase.
		An antifuse, on the other hand, is normally open and requires some action to close the connection, that is, to electrically connect one end of the antifuse to the other.
	web.engr.oregonstate.edu /~flf/6288437.html (7152 words)

	U.S. Patent: 5191550 - Dual antifuse memory device - March 2, 1993
		In an alternative embodiment of the present invention the conductive layer in the first antifuse memory element is a first conductive semiconductor layer, the conductive layer in the second antifuse memory element is a second conductive semiconductor layer.
		Similarly, the second connection portion in the first antifuse memory element and the second connection portion in the second antifuse memory element may be formed as a unitary structure.
		In a second exemplary embodiment, the first antifuse memory element formed on the first conductive semiconductor layer and the second antifuse memory element formed on the second conductive semiconductor layer are connected in parallel between the first and second electrode wirings.
	www.everypatent.com /comp/pat5191550.html (3338 words)

	EDACafe: ASICs .. the Book
		Figure 4.4 shows that the average QuickLogic metal–metal antifuse resistance is approximately 80 W (with a standard deviation of about 10 W) using a programming current of 15 mA as opposed to an average antifuse resistance of 500 W (with a programming current of 5 mA) for a poly–diffusion antifuse.
		However, the antifuse is so small that it is normally the contact and metal spacing design rules that limit how closely the antifuses may be packed rather than the size of the antifuse itself.
		The intrinsic parasitic capacitance of an antifuse is small (approximately 1–2 fF in a 1 m m CMOS process), but to this we must add the extrinsic parasitic capacitance that includes the capacitance of the diffusion and poly electrodes (in a poly–diffusion antifuse) and connecting metal wires (approximately 10 fF).
	www.edacafe.com /books/ASIC/Book/CH04/CH04.1.php (1307 words)

	Pico Systems, 2.0 Background and Setup
		The purpose of the evaluation circuit was to stress antifuses and antifuse-metal contacts to induce failure.
		Table 1 summarizes the thermal stresses experienced by the antifuses under various operating current, I. is the melting point of the filament (the conductive path between the electrodes of the antifuse).
		By varying the number of antifuses programmed in series, different load conditions are applied to the antifuses under test (and interconnecting metallization and wire bonds).
	misspiggy.gsfc.nasa.gov /tva/pico/back.htm (685 words)

	Antifuse Notes
		Temperature at the conductive link is the temperature at which the antifuse is stressed and is controlled by the stress current, not the ambient.
		The reliability of the unprogrammed antifuse structures were determined through a design of experiments (DOE) approach which used accelerated voltage stressing to calculate a failure rate.
		Measured temperature dependence of antifuse resistance is for the first time used to derive key physical parameters in the model.
	klabs.org /richcontent/fpga_content/pages/notes/antifuse_notes.htm (1619 words)

	Including Programmable Passive Component (e.g., Fuse) - Anti-fuse patents
		An antifuse including a bottom plate having a plurality of longitudinal members arranged substantially parallel to a first axis, a dielectric layer formed on the bottom plate, and a top plate having a plurality of longitudinal members arranged substantially parallel to a second axis, the top plate formed over the...
		An antifuse has a layer of gate dielectric between a first terminal coupled to receive an elevated voltage and a second terminal, and a high-voltage transistor is coupled to...
		The antifuse is located between overlying and underlying conductive layers, and includes: a contact and/or via hole in an insulating layer on the underlying conductive layer; a lower metal...
	www.freshpatents.com /x1257530000psbc.php (1636 words)

	Three-statable net driver for antifuse field programmable gate array - Patent 6028444
		During antifuse programming, to isolate the output of the inverter from high voltages that could be present on horizontal routing conductor 10, protection transistors 15 and 16 are made nonconductive by coupling the gates of protection transistors 15 and 16 to ground potential (for example, 0 volts).
		Due to the capacitive load of the routing conductors and programmed antifuses downstream of the programmed antifuses 8 and 9 and the capacitive load of input 7, it may be believed that the net driver should be fashioned to supply as large a current as possible during switching.
		One antifuse may be programmed to make a connection for 5.0 volt operation whereas another antifuse may be programmed to make a connection for 3.3 volt operation.
	www.freepatentsonline.com /6028444.html (3448 words)

	Actel's antifuse reduces delays Electronics Times - Find Articles
		Actel's low-impedance antifuse that sits between the metal routing layers in a field programmable gate array (FPGA) cuts the clock-to-output delay to less than 5ns, which enables the device to support 66MHz PCI designs.
		By moving the antifuses to between the second and third metal layers, the FPGA should have seven more routing switches than current SRAM designs of the same die size.
		The number of antifuses that an interconnect line can use has been limited to five by employing segmented routing to reduce the worst-case delays for crosschip signals.
	www.findarticles.com /p/articles/mi_m0WVI/is_1998_April_27/ai_50046119 (564 words)

	Repeatable low-breakdown voltage antifuses enabled through a Sandia-developed dielectric thin film
		Antifuses are nonvolatile, one-time programmable memories fabricated on ICs that are programmed with applied voltage.
		Chips with antifuse devices may also be used in high radiation environments or for long-term storage where flash memory would not be reliable.
		Current antifuse technologies rely on complex stacks of ultra-thin films that are foreign to standard Complimentary Metal Oxide Semiconductor (CMOS) processes.
	www.eurekalert.org /pub_releases/2006-05/dnl-rlv051506.php (511 words)

	APP - Licensing of Technology.
		Antifuse devices are ideal for forming the programmable elements in field programmable gate arrays (FPGAs).
		Antifuse has advantages of low capacitance connections and hence high speed.
		In antifuse, a connection is formed by fusing a link through an insulator using a programming current.
	www.physics.usyd.edu.au /app/licensing/index.html (610 words)

	All is Not SRAM (Site not responding. Last check: 2007-11-05)
		Non-volatile PLD technologies such as flash, antifuse and EE tend to rank in the “moderate-high” range, meaning it would cost tens to hundreds of thousands of dollars to crack by a highly skilled team, and the attack could be unsuccessful.
		For antifuse devices, the location of bridging metal in an antifuse is extremely difficult to detect as it can occur anywhere in the antifusable region and can be viewed only through a vertical slice using a sophisticated scanning electron microscope.
		The metal-to-metal antifuse connections are immune to radiation effects, so the configuration of the device is never at risk.
	www.fpgajournal.com /articles/sram.htm (2602 words)

	Method to electrically program antifuses (Site not responding. Last check: 2007-11-05)
		Thereafter, a "pop voltage" (i.e., the voltage required to blow the antifuse) is routed to that particular antifuse from a source that is external to the antifuse bank.
		a plurality of antifuses, each of said plurality of antifuses being respectively switchably coupled to each of said column lines for receiving said output signal, wherein the receipt of said output signal results in at least a selected one of said plurality of antifuses being receptive to being programmed by a programming signal.
		The system as in claim 6, wherein each of said plurality of antifuses has a first side and a second side, wherein said first side experiences a change in voltage potential with respect to said second side in response to said antifuse being selected, said change in potential causes said antifuse to be programmed.
	www.57069.com /user512628532/automatic_saw_chain_grinder/electrically_program_antifuses.html (1206 words)

	Embedded.com - The future of programmable logic
		Other advantages of antifuses included higher densities (and thus lower costs per gate) and the elimination of the extra PROM from the board.
		It turned out the antifuse process was nonstandard and more difficult than SRAM, leading to delays in getting new parts to market and leaving it generations behind SRAM in process development.
		SRAM is the dominant technology, though antifuse is used for applications where the protection of intellectual property is paramount.
	www.embedded.com /showArticle.jhtml?articleID=15201141 (2034 words)

	7.1 Actel ACT (Site not responding. Last check: 2007-11-05)
		The last two columns show the total number of antifuses (including antifuses in the I/O cells) on each chip and the total number of antifuses assuming the wiring channels are fully populated with antifuses (an antifuse at every horizontal and vertical interconnect intersection).
		This type of antifuse (a fast fuse) is blown at a higher current than the other antifuses to give them about half the nominal resistance (about 0.25 k W for AC T 2) of a normal antifuse.
		The nominal antifuse resistance is reduced further in the ACT 3 (using a 0.8 m m process) to 200 W (Actel does not state whether this value is for a normal or fast fuse).
	www-ee.eng.hawaii.edu /~msmith/ASICs/HTML/Book/CH07/CH07.1.htm (2209 words)

	Embedded.com - Back to the Basics: All about FPGAs
		Another method involves an antifuse that consists of a microscopic structure that, unlike a regular fuse, normally makes no connection.
		The advantages of antifuse FPGAs are that they are non-volatile and the delays due to routing are very small, so they tend to be faster.
		Antifuse FPGAs tend to require lower power and they are better for keeping your design information out of the hands of competitors because they do not require an external device to program them upon power-up as SRAM devices do.
	www.embedded.com /showArticle.jhtml?articleID=183701900&pgno=2 (1078 words)

	Antifuse FPGA Technology: Best Option for Satellite Applications \| COTS Journal
		If programmability is required, antifuse FPGAs are inherently more rad-tolerant than their SRAM counterparts; moreover, they offer substantial as-flown weight savings.
		Because no one technology is perfect for all applications, the designers of satellites face the same issues that challenge designers everywhere, trading off one attribute for another to find the best fit for a particular application.
		Further, radiation-tolerant antifuse FPGAs offer the following additional benefits: reduced weight and board space due to decrease in devices required; ease of implementation with no configuration components; the lowest FPGA power consumption; high reliability; and availability of medium- to high-density solutions.
	www.cotsjournalonline.com /home/article.php?id=100087 (716 words)

	How to Protect Intellectual Property in FPGAs Devices--Part 1
		With antifuse FPGAs all of the "intelligence" for programming the device is contained in the programmer, not in the device, so no programming file (or bitstream) is readable from the device.
		In an antifuse FPGA, a fuse link is created (rather than blowing a fuse, hence the name antifuse) during programming, but even so it is difficult to invasively attack and clone antifuse FPGAs.
		With a flash device, the application designer writes the configuration bitstream into the part during manufacture of the application and then locks it into the part, increasing the IP security of flash devices, because the configuration bitstream is never exposed or available outside of the device where it can be obtained and cloned.
	www.us.design-reuse.com /articles/article11200.html (2019 words)

	Antifuse with electrostatic assist page
		A structure and method for providing an antifuse which is closed by laser energy with an electrostatic assist.
		Two or more metal segments are formed over a semiconductor structure with an air gap or a porous dielectric between the metal segments.
		The electrostatic field reduces the amount of laser energy which must be applied to the semiconductor structure to close the antifuse.
	www.patentalert.com /docs/001/z00155852.shtml (282 words)

	Actel - 8/17/2000 - EDN (Site not responding. Last check: 2007-11-05)
		Antifuse technology delivers low-impedance—therefore, low-power and high-speed—signal interconnection and more robust immunity to high-radiation operating environments than other configuration technologies provide.
		The PLICE antifuse structures, which reside on the same base layer as active circuit elements, take up die area that could otherwise find use in constructing additional logic blocks, embedded memory arrays, and other circuits.
		The high voltage necessary to configure an antifuse FPGA usually means that you program it before installing it on your system board, and, because antifuse creation is irreversible, in-system reconfiguration is impossible.
	www.edn.com /index.asp?layout=article&articleid=CA47105&pubdate=08/17/00 (697 words)

	Programmable Logic DesignLine \| FPGA Architectures from 'A' to 'Z' : Part 1
		As each antifuse is being processed, the device programmer keeps on testing it to determine when that element has been fully programmed, then it moves onto the next antifuse.
		Even if the device is de-capped (its top is removed), programmed and unprogrammed antifuses appear to be identical, and the fact that all of the antifuses are buried in the internal metallization layers makes it almost impossible to reverse engineer the design.
		Also, they might casually mention that an antifuse is much smaller and thus occupies much less real-estate on the chip than an equivalent SRAM cell (although they may neglect to mention that antifuse devices also require extra programming circuitry including a large, hairy programming transistor for each antifuse).
	www.pldesignline.com /showArticle.jhtml;jsessionid=3HAX3QWDM5DJSQSNDLPCKHSCJUNN2JVN?printableArticle=true&articleId=192200165 (5934 words)

	What is AntiFuse Technology? :: Technology News and Opinions
		Well, Intel has picked up a clue from Microsoft and (it is established practice folksâ¦) from several other manufacturers and apparently introduced antifuses in their latest Pentium D 920 CPUS which have been manufactured using the 65mm process.
		Antifuses are used in the manufacture of electronics circuits by manufacturers who want to produce one CPU or component and then enable say, more expensive features in a smaller and more expensive range.
		Well, according to EE Times researchers are hinting that this process has been used by Intel to hide extra cache for a new version to be perhaps released later.
	www.devlib.org /blog/2006/01/24/what-is-antifuse-technology (297 words)

	Antifuse
		Often a special bulb with no antifuse known as a "fuse bulb" is incorporated into the string of lights to protect against the possibility of severe overcurrent if too many bulbs fail.
		Note that they avoid use of the term antifuse presumably because of their non-technical audience.
		For the first phase of the experiment, to be started early next year, they will look for evidence of signaling
	www.mrsci.com /Digital-Electronics/Antifuse.php (829 words)

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