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Topic: Asynchronous circuit


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In the News (Tue 22 Dec 09)

  
  Asynchronous circuit - Wikipedia, the free encyclopedia
An asynchronous circuit is a circuit in which the parts are largely autonomous.
Circuit speed is adapted on the fly to changing temperature and voltage conditions rather than being locked at the speed mandatd by worst-case assumptions.
Synchronous circuits create a great deal of EMI in the frequency band at (or very near) their clock frequency; asynchronous circuits generate EMI patterns which are much more evenly spread across the spectrum.
en.wikipedia.org /wiki/Asynchronous_circuit   (804 words)

  
 LECTURE 1
In an asynchronous circuit each component starts its computation as soon as all the required data are available and transmits its outputs to the next components, as soon as its computation is completed.
In asynchronous circuits such pulses may interfere with the correct operation of the circuit, and should be prevented.
The ICEL circuit is obtained from the CEL circuit by connecting an INVERTER to the A-input of the CEL circuit.
www.cs.technion.ac.il /~myoeli/pub/ver_toc/lot_ch7.htm   (1203 words)

  
 [No title]   (Site not responding. Last check: 2007-11-07)
In particular, the circuit must be very fast (since it is on the critical path between the processor and memory) and must also be very small (otherwise the savings in instruction memory will be lost to the area increase due to the decompression circuit).
Preferably, the decoder circuit further includes a shift circuit coupled to the carry output of the adder circuit and the completion signal of the first logic circuit, the shift circuit producing a control signal output for clocking the plurality of registers of the input buffer.
A self-time ring is a circuit that does not use a global synchronizing clock and in which the functional stages of the circuit are looped in a ring form.
www.wipo.int /cgi-pct/guest/getbykey5?KEY=00/16486.000323&ELEMENT_SET=DECL   (9716 words)

  
 Asynchronous Circuit Design: Preface
An asynchronous circuit is one in which synchronization is performed without a global clock.
In asynchronous circuits, the speed of the circuit is allowed to change dynamically, so the performance is governed by the average-case delay.
Asynchronous circuits reduce synchronization power by not requiring additional clock drivers and buffers to limit clock skew.
www.async.ece.utah.edu /book/preface.html   (1173 words)

  
 [No title]   (Site not responding. Last check: 2007-11-07)
For example, a clocked Boolean logic circuit might present input signals to a circuit on the rising edge of a clock, and latch the output of the circuit on the falling edge of the clock.
All asynchronous registers will initially signal to their immediately upstream asynchronous register (or in the case of the first asynchronous register 20, to the upstream interface circuit 224), that they are ready to receive DATA.
The interface circuit 717 accepts requests for data from a downstream CBL circuit (not shown) on request signal line 703, and issues an acknowledge signal on acknowledge signal line 704 when data is ready.
www.wipo.int /cgi-pct/guest/getbykey5?KEY=00/13094.000309&ELEMENT_SET=DECL   (7608 words)

  
 Formal Verification and Testing of Asynchronous Circuits   (Site not responding. Last check: 2007-11-07)
During these last few years, asynchronous circuits have gained interest due to their potential advantages, such as local synchronization, elimination of the clock skew problem, faster and less power-consuming circuits, electro-magnetic compatibility and high degree of modularity.
Circuit verification involves to processes: proving that a circuit behaves accordingly to its specification and guaranteeing that the circuit fulfills several properties.
Several languages and formalisms allow to specify the behavior of asynchronous circuits: CSP, Petri nets, process algebras, etc. We have chosen Petri nets because they are familiar to researchers in several fields, in particular to the asynchronous circuit design community.
research.ac.upc.es /VLSI/Abstracts/oriol97Phd.html   (668 words)

  
 [No title]
ASYNCHRONOUS CIRCUITS ===================== Asynchronous circuits operate without a global clock signal - the flow of data is controlled by local handshaking between subsystems at all levels in the design.
Asynchronous circuits may be faster, consume less power, avoid electro-magnetic emission of clock harmonics, and may offer natural solutions in multi-clock environments.
Asynchronous logic can be expected to find niches in the digital electronics business over the next few years.
www.win.tue.nl /~wstomv/misc/async97/sum97.txt   (2146 words)

  
 ICS - CARV: Asynchronous Circuit and System Design Group
Asynchronous circuits can change their speed dynamically and their performance is data-driven and governed by average-case delay.
Asynchronous circuits are adaptive and can operate correctly under all variations with their speed increasing or descreasing, as is necessary.
Lower power and lower Electromagnetic Emissions: asynchronous circuits reduce synchronisation power and automatically power-down unused components; asynchronous circuits are also quiet as they avoid unneeded signal transitions and spread out needed signal transitions.
www.ics.forth.gr /carv/async   (479 words)

  
 ICS - CARV: Asynchronous Circuit and System Design Group - ASPIDA
In the case of the asynchronous control circuit, however, the situation is different.
The logic of the asynchronous parts of the design is typically intolerable of optimizations.
Asynchronous control circuits designed according to the Delay-Insensitive or Quasi Delay-Insensitive models can be placed in any way with no impact on circuit correctness.
www.ics.forth.gr /carv/async/demo/xilinx_flow.html   (507 words)

  
 [No title]   (Site not responding. Last check: 2007-11-07)
As you will see, we will design asynchronous circuits with the assumption that an input change directs the circuit to a new state; if during the time the circuit is changing to the new state, another input arrives, unpredictable mis-directions of flip flop outputs may occur.
Asynchronous circuits have certain good features, chief among them are (1) "instant" response to changes in any input, without having to wait for a clock, and (2) economy of design, such as no need for a clock.
In asynchronous circuits made from un-clocked flip flops, the flip flop outputs can feed back to become combinational inputs which steer S and R, or T or D. This circuit is like one we saw for synchronous design, except there is no clock here.
www.engin.brown.edu /faculty/daniels/ddzo/async.html   (9595 words)

  
 Tanner Labs Research - Asynchronous Circuit Design Tools
Asynchronous design offers significant benefits for portable electronics, yet it is risky in the hands of inexperienced designers, and there are few experienced designers.
Tanner Labs is developing a comprehensive automated asynchronous circuit design flow that takes the engineer from the high-level circuit description, through simulation and verification, to layout design that is ready for fabrication.
Our asynchronous design tools will implement new synthesis techniques for datapath-based designs, and they will allow the design engineer to optimize the design with respect to speed, power, and architecture.
www.tanner.com /Labs/research/technologies/asynch_logic/asynch_cad.htm   (212 words)

  
 Beating the Clock
Today's synchronous circuits are designed in terms of operations such as addition, division and I/O. According to Ivan and his colleagues, this operations-centric view made sense in the simpler, older world of vacuum tubes and transistors of the 1940s and 50s.
Such asynchronous circuits offer high speed because they are composed of few transistors which coordinate the actions of adjacent building blocks.
Synchronous circuits keep jogging in place." Asynchronous circuits achieve speed by allowing each gate to set its own pace rather than waiting for the next tick of a system clock, whose pace is set by the slowest part of the chip.
research.sun.com /features/async   (1626 words)

  
 Asynchronous Circuit Synthesis with Boolean Satisfiability - Gu, Puri (ResearchIndex)   (Site not responding. Last check: 2007-11-07)
Abstract: Asynchronous circuits are widely used in many real time applications such as digital communication and computer systems.
The design of complex asynchronous circuits is a difficult and error-prone task.
In this paper, we present a general and efficient partitioning approach to the synthesis of asynchronous circuits from general Signal Transition Graph (STG) specifications.
citeseer.ist.psu.edu /29230.html   (387 words)

  
 Switching Theory
The circuit example above, designed with the methods presented in the monograph, switches the input clock stream (C) to one of two output lines under control of the enable line (E).
This circuit is not covered in the monograph, but is described and implemented in a companion paper, Designing a Divide-by-Three Logic Circuit, available here.
Here is a circuit which is similar to a 'D' flip-flop, except that it transfers the input data to the output on every clock edge, not just those of a single polarity.
www.crbond.com /switching_theory.htm   (556 words)

  
 Asynchronous circuit design and testing
Asynchronous circuits are a promising technology for low-power, high-performance, low-emission and highly modular digital circuits.
The technique is the cheapest and simplest known way to obtain an asynchronous design by deviating as little as possible from the standard synchronous flow.
A good list of other references on asynchronous circuits can be found at the WEB site of the asynchronous group of the University of Manchester.
polimage.polito.it /~lavagno/async.html   (503 words)

  
 Asynchronous Circuit Verification Using Trace Theory and CCS (ResearchIndex)   (Site not responding. Last check: 2007-11-07)
Asynchronous Circuit Verification Using Trace Theory and CCS (1995)
Abstract: We investigate asynchronous circuit verification using Dill's trace theory [1] as well as Milner's CCS (as mechanized by the Concurrency Workbench).
Trace theory is a formalism specifically designed for asynchronous circuit specification and verification.
citeseer.ist.psu.edu /662883.html   (405 words)

  
 [No title]
The input of the CAD flow is a behavioral description of the circuit to be implemented and the output is a simulation model of the circuit implemented on the GAPLA FPGA.
The main modules in the CAD flow include a circuit partitioner, a scheduler, a coarse floorplanner, an asynchronous communication controller, a synchronous logic synthesizer (using existing FPGA compilers) and a performance evaluator.
To reduce the synchronization overhead, the proposed algorithm schedules all the processes simultaneously and operations in a process are scheduled in order based on their relations to inter-process communications.
www.ececs.uc.edu /~jiax/XIn_Jia_Resume_tex   (1031 words)

  
 ACiD-WG Home Page   (Site not responding. Last check: 2007-11-07)
To encourage excellence in science and technology research pertaining to asynchronous circuits and systems.
To demonstrate the strength of European RTD in asynchronous circuits and systems, participation in the annual "Async" international symposium was considered particularly desirable.
The project "Petrify: methodology and tool for logic synthesis of asynchronous circuits", co-ordinated by UPC and involving PoliTo, UNew, Intel and Cadence, was selected as one of the ten finalist projects for the 2002 EU Descartes Prize for outstanding research through transnational collaboration.
www.scism.sbu.ac.uk /ccsv/ACiD-WG   (1085 words)

  
 Asynchronous Circuit Design:047141543X:Chris J. Myers (Department of Electrical Engineering, University of Utah, Salt ...
The field of asynchronous circuit design is growing rapidly in commercial importance as practitioners take advantage of its benefits in terms of power consumption and speed.
Asynchronous Circuit Design also features: *Asynchronous protocols *Graphical representations used for asynchronous design *Huffman style synthesis/fundamental-mode design *Muller style synthesis/speed-independent design *Techniques for timing analysis and optimization *Methods for verification of asynchronous circuits *Asynchronous applications *Further support material available for download from the Wiley ftp site
Accessible for both advanced undergraduate and graduate students in electrical engineering courses, practicing designers, and developers in the industry, Asynchronous Circuit Design is the most up-to-date and focused resource in the field.
www.ecampus.com /bk_detail.asp?isbn=047141543X&referrer=yah04   (231 words)

  
 ICS - CARV: Asynchronous Circuit and System Design Group - Related Teaching Courses
The course explores the basics of CMOS transistor operation and CMOS gate design, the design of CMOS layouts of complex gates and subsystems, electrical effects on speed and area and reviews in detail several CMOS subsystems that are commonly used in contemporary ICs.
It begins from the basic principles of asynchronous designs including micropipelines, multi-rail encodings, studies the token model of circuits and presents approaches to asynchronous control circuit design based on STGs.
It presents the key concepts behind boolean networks, the minimization of two-level circuits using exact and heuristic methods, extends into multiple level circuit representations including BDDs and ITEs and considers the multi-level synthesis and optimization methods and approaches for design-for-testability.
www.forth.gr /ics/carv/async/teaching.html   (351 words)

  
 ASTI   (Site not responding. Last check: 2007-11-07)
It continued supporting our main activity in automated synthesis and testing of asynchronous control circuits started in the earlier ASAP Project (Automated Synthesis of Parallel and Asynchronous Controllers, GR/J52327), and assisted further collaboration within Petrify consortium.
(c) Development of a new method for detecting delay faults in sequential asynchronous circuits using partial scan, and investigation of new approaches for built-in testing of asynchronous circuits based on behavioural models.
Asynchronous circuit synthesis and testing (ASTI), 30 April 1999
www.staff.ncl.ac.uk /alex.yakovlev/home.formal/asti_report.html   (619 words)

  
 Bibliography generated from async.bib
A new contactless smartcard IC using an on-chip antenna and an asynchronous micro-controller.
Advances in asynchronous circuit theory; part I: Gate and unbounded inertial delay models.
A novel asynchronous control unit and the application to a pipelined multiplier.
www.win.tue.nl /async-bib/doc/async.html   (4988 words)

  
 Amazon.co.uk: Principles of Asynchronous Circuit Design: A Systems Perspective: Books   (Site not responding. Last check: 2007-11-07)
Part II is a 4-chapter introduction to Balsa, a freely-available synthesis system for asynchronous circuits which will enable the reader to get hands-on experience of designing high-level asynchronous systems.
Part III offers a number of examples of state-of-the-art asynchronous systems to illustrate what can be built using asynchronous techniques.
The objective in writing this book has been to enable industrial designers with a background in conventional (clocked) design to be able to understand asynchronous design sufficiently to assess what it has to offer and whether it might be advantageous in their next design task.
www.amazon.co.uk /exec/obidos/ASIN/0792376137   (401 words)

  
 ACK - A Highlevel Asynchronous Synthesis Framework
The ACK high-level synthesis framework for asynchronous circuit design was started as a Ph.D thesis project by Dr. Prabhakar Kudva during fall '94 and has expanded ever since.
The goal of the ACK project is to create a design framework for synthesis of high-performance asynchronous system-level circuits.
Asynchronous Circuit Design - A Case Study of a Framework Called ACK.
www.cs.utah.edu /acs   (353 words)

  
 Optimised state assignment for asynchronous circuit synthesis   (Site not responding. Last check: 2007-11-07)
This paper presents a new efficient optimised state assignment method for solving complete state coding (CSC) problem that operates purely at the state graph level and is applicable to a broad class of behaviors.
This method has been automated and applied to a large set of asynchronous benchmarks and industrial circuits.
Compared to existing techniques, this new method achieves significant improvements in terms of both circuit area and computation time.
csdl.computer.org /comp/proceedings/async/1995/7098/00/70980118abs.htm   (156 words)

  
 A basic circuit for asynchronous superconductive logic using RSFQ gates
This paper presents a basic circuit concept for pulse-driven asynchronous circuits using superconducting rapid single-flux-quantum (RSFQ) logic gates.
One way to solve this problem is to use asynchronous circuits in which all circuits perform their functions only under the law of cause and effect.
We propose an implementation of the basic asynchronous circuit performing OR/AND logic operations between SFQ pulses.
stacks.iop.org /0953-2048/9/A46   (284 words)

  
 Asynchronous Logic: Background   (Site not responding. Last check: 2007-11-07)
An Introduction to Asynchronous Circuit Design (Postscript) by Al Davis and Steve Nowick
Three disciplines for the design of asynchronous circuits (1996)
It is necessarily selective but the primary criterion has been to provide a variety of designs which are accessible via the WWW.
www.cs.man.ac.uk /async/background   (111 words)

  
 Maveric Group Publications
Ebergen and R. Berks, VERDECT: A Verifier for Asynchronous Circuits, Newsletter of the Technical Committee on Computer Architecture (TCCA), IEEE Computer Society Press, 10 pp., October 1995.
Bogue, M. Gossel, and H. Jurgensen, Design of Cover Circuits for Monitoring the Output of a MISA, Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, Montreal, Canada, 1994, pp.
Segers, The Design and Analysis of Asynchronous Up-Down Counters, thesis for the degree `Ingenieur in de Technische Informatica' from Eindhoven University of Technology, May 1993.
maveric.uwaterloo.ca /publication.html   (2002 words)

  
 EDIS   (Site not responding. Last check: 2007-11-07)
is a bibliography database, in BibTeX format, with hundreds of references in the area of asynchronous circuit design.
Delay-insensitive circuits: an algebraic approach to their design.
An overview of DI algebra for delay-insensitive circuits.
edis.win.tue.nl /bibl.html   (393 words)

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