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| | Maveric Group Publications |
 | | Ebergen and R. Berks, VERDECT: A Verifier for Asynchronous Circuits, Newsletter of the Technical Committee on Computer Architecture (TCCA), IEEE Computer Society Press, 10 pp., October 1995. |
 | | Bogue, M. Gossel, and H. Jurgensen, Design of Cover Circuits for Monitoring the Output of a MISA, Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, Montreal, Canada, 1994, pp. |
 | | Segers, The Design and Analysis of Asynchronous Up-Down Counters, thesis for the degree `Ingenieur in de Technische Informatica' from Eindhoven University of Technology, May 1993. |
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