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| | LostCircuits, Memory Reviews |
 | | On a page hit, the latency that decides how early the critical word is output is the CAS latency. |
 | | In clear text, this means that the read command can be issued early, that is exactly one CAS latency before the end of the burst without trashing the data in the output buffers. |
 | | To reiterate, in an SDRAM situation, the additional latency of a CAS-3 part cannot be hidden, even in page hit situations, in a DDR scenario, there is no real impact of CAS-2 vs. CAS 2.5 while staying in page. |
| www.lostcircuits.com /memory/ddr2/2.shtml (926 words) |
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