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	Overclocking, Jumpers and BIOS
		The two values that determine the speed of the processor (frequency of the bus or clock and multiplier) are found on the motherboard.
		Each speed of the motherboard bus and the CPU multipliers has a different position from the jumpers, the colours of which might be fl, blue, white, yellow or red, according to the manufacturer.
		The configuration of the CPU multiplier is done in the same way as for the speed of the motherboard bus.
	www.helpoverclocking.com /english/jumpers.htm (425 words)

	Clock multiplier using masked control of clock pulses - Patent 6914459
		The clock multiplier circuit generates a number of pulses to be used as the clock output signal, wherein the pulses have a pulsewidth that is independent of the number of pulses generated and independent of the frequency of the clock input signal.
		The clock multiplier circuit is configured to generate a number of pulses on the output clock signal responsive to an edge of the input signal, wherein the pulses have a width that is independent of the number of pulses generated and independent of the frequency of the input signal.
		In other embodiments, separate clock generation circuitry (not shown) may be included in parallel with the clock multiplier circuit 14 and the clock to the core 16 may be selected from the clock multiplier circuit 14 or the clock generation circuit by selection circuitry based on whether or not testing is being performed.
	www.freepatentsonline.com /6914459.html (7578 words)

	Temperature independent, wide range frequency clock multiplier - Patent 5818270
		Clock multiplier 10 has N-1 concatenated delay cells 11, 12, 17, a logical multiplication function 14, a delay monitor 19, a phase detector 30, a charge pump 33, a low pass filter 35 and a voltage-to-current converter 37.
		Clock multiplier functions include operation as a feedback control system, in such, a control current 23 that is an output of a delay controller 20, converges to a steady-state level, resulting in a loop locked on a fixed delay.
		An input clock signal 13 to multiplier 10, is input to an adjustable delay cell 11, which delays the clock signal, and to a multiple input exclusive OR gate 14, shown in FIG.
	www.freepatentsonline.com /5818270.html (5855 words)

	Clock Multiplier
		The Multiplier is used in combination with the oscillator to increase the number of state changes from zero to one.
		The Multiplier is another oscillator circuit designed to increase the base system clock's output and simulate a much higher speed.
		Many mainboards today come with auto-detection capabilities to determine the CPU type and speed, and automatically configure the voltage, clock and multiplier settings (as well as clock speeds for memory and devices).
	www.inetdaemon.com /tutorials/computers/hardware/mainboards/multiplier.shtml (142 words)

	All Athlon 64 Models \| Hardware Secrets
		Instead of being generated thru the CPU base clock (HTT clock, which is of 200 MHz), it divides the CPU internal clock.
		The problem is when the CPU clock multiplier is an odd number.
		For an AM2 CPU with a clock multiplier of 13x, theoretically its memory bus divider would be of 6.5.
	www.hardwaresecrets.com /article/272 (1006 words)

	Overclocking, Before starting
		At present, the speed of the CPU is determined by two factors: the speed of the clock in the motherboard (whose values affects all the components in the computer) and the frequency multiplier (whose value only affects the processor).
		When multiplied by each other, these values configured through the motherboard will determine the speed at which the processor works.
		The next step is to check what motherboard and CPU multiplier speed values are being used by the present system configuration and what values it allows.
	www.helpoverclocking.com /english/preparativos.htm (304 words)

	Tech Headaches: A Guide to Overclocking Your CPU
		Overclocking through the CPU Clock Multiplier is perhaps one of the easiest methods.
		The CPU Clock Multiplier is the number of cycles your CPU does during one tick of the front side bus.
		For example, my frontside bus runs at a speed of 166MHz, and my CPU Clock Multiplier is 11.5, meaning that each time my front side bus completes a cycle at 166MHz, my CPU has completed 11.5 cycles during that time.
	techheadaches.blogspot.com /2006/07/guide-to-overclocking-your-cpu_13.html (1477 words)

	OC (clock / multiplier locking)
		Pentium with plastic PGA have the 3x and 3.5x multipliers enabled, where as the ones with the ceramic PGA don't, but this isn't always true.
		That pretty much leaves one way to lock down the multiplier: put a circuit on the Slot 1 PCB that sits between the chipset and the CPU pins.
		The fact that the PIII core is not locked to a specific speed, but to a range of speeds, shows that my concerns about the feasibility of building an on-die, temperature-independent bus lock were justified.
	www.plasma-online.de /english/upgrade/tweak/overclock/oc_locking.html (834 words)

	Understanding System Memory and CPU speeds : OEMPCWorld.com
		This means that data is transferred twice per clock cycle, on the rising and falling edge (like DDR memory which will be mentioned later), and also transfers two bytes of data at a time to effectively give four times the throughput of a 100Mhz front side bus.
		From the system clock your PCI bus speed is determined via the use of a divider and then your AGP bus speed is determined by multiplying the PCI bus speed by 2.
		Since the system clock speed is usually not automatically set by the processor you put into the board, this means that if you put a processor with a higher bus speed than the lowest one the board supports, you are underclocking the processor.
	www.oempcworld.com /support/fsb.htm (3830 words)

	Basics of CPU Speed Two variables determine the speed at which your CPU runs
		The clock divider sets the clock rate for the PCI bus as a fraction of the frontside bus speed.
		On motherboards with a frontside bus speed of 100 MHz, for instance, the clock divider is set to 1/3 that speed, to deliver a PCI bus clock speed of 33 MHz.
		The motherboard chipset controls the clock multiplier, which, in conjunction with the FSB speed, determines the core speed of the CPU.
	www.agathering.net /computer/overclock/basics_of_cpu_speed_two_variable.htm (301 words)

	Clock signal - Wikipedia, the free encyclopedia
		A clock signal oscillates between a high and a low state, normally with a 50% duty cycle, and is usually a square wave.
		Such sine wave clocks are often differential signals, because this type of signal has twice the slew rate, and therefore half the timing uncertainty, of a single-ended signal with the same voltage range.
		The clock signal is usually distributed across a chip by a recursive H tree.
	en.wikipedia.org /wiki/Clock_signal (552 words)

	Overclocking - Wikipedia, the free encyclopedia
		The clock speed that the CPU is rated for is the speed at which the CPU has passed the manufacturers functionality tests when operating in worst-case conditions (for example, the highest allowed temperature and lowest allowed supply voltage).
		However, the memory speed is computed by dividing the processor speed (which is a base number times a CPU multiplier, for instance 1.8 GHz is most likely 9x200 MHz) by a fixed integer such that, at stock speeds, the RAM would run at a clock rate near 333 MHz.
		Along with the higher clock frequencies come higher temperatures, coupled with the fact that most video cards are sold with coolers designed only to support standard stock temperatures many graphics cards overheat and burn out when overclocked too much.
	en.wikipedia.org /wiki/Overclocking (3857 words)

	Basics of CPU Speed Two variables determine the speed at which your CPU runs
		The clock divider sets the clock rate for the PCI bus as a fraction of the frontside bus speed.
		On motherboards with a frontside bus speed of 100 MHz, for instance, the clock divider is set to 1/3 that speed, to deliver a PCI bus clock speed of 33 MHz.
		The motherboard chipset controls the clock multiplier, which, in conjunction with the FSB speed, determines the core speed of the CPU.
	agathering.net /computer/overclock/basics_of_cpu_speed_two_variable.htm (301 words)

	Universal Audio \| Digital Products \| 2192 \| Tips & Tricks \| Digital Audio Clocking Primer
		Clock jitter is short-term variations in the edges of a clock signal, and clock drift is long-term variations in the clock rate.
		Clock jitter in digital transmission can be caused by a bad source clock, inferior cabling or improper cable termination, and/or signal-induced noise (called "pattern-jitter" or "symbol-jitter").
		As we said earlier, the clock recovered from the digital inputs is unsuitable for use as the converter's m-clock, but because it's conveniently at the same frequency, many designers don't bother cleaning-up this signal.
	www.uaudio.com /products/digital/2192/clockprimer.html (1030 words)

	EETimes.com - Clock Management with PLLs and DLLs
		Clock skew is the result of minor variations in the time at which clock signals arrive at their destinations, usually register clock pins.
		Clock skew occurs because the clock must be distributed throughout the system using board traces, connectors, backplanes, and chip-level input-clock driver pads and on-chip interconnect.
		The 78-MHz clock is multiplied by four with a PLL or DLL to produce 311 MHz.
	www.eetimes.com /isd/cover_story/OEG20010328S0051 (2141 words)

	Ars Technica: A brief history of clock - Page 1 (4/99)
		Our clocking and locking articles do a lot to explain the possible methods Intel uses to lock its chips, but they can get a little technical at times.
		With the advent of the Pentium chip, multipliers became a regular part of the system, and we had two speeds to contend with—bus speed and processor speed.
		Thus the practice of multiplier overclocking (or running a component, in this case a processor, at a higher than its rated speed) was born.
	arstechnica.com /cpu/2q99/clock-intel-1.html (655 words)

	Understanding CPU Overclocking
		Basically overclocking means to run a microprocessor faster than the clock speed for which it has been tested and approved.
		The multiplier on newer Intel CPUs cannot be adjusted, leaving Intel overclockers with the FSB overclocking method (because of this AMD is becoming more of a popular choice for overclockers).
		"Multiplier locking forces the CPU to use a multiplier that is preset by the manufacturer.
	www.webopedia.com /DidYouKnow/Computer_Science/2005/overclocking.asp (1441 words)

	Target PC :: Troubleshooting overclocking problems ( Part 2 )
		This is achievable by increasing the CPU clock multiplier, the front side bus speed (FSB), or a combination of the two.
		The way to determine a possible overclock speed is to multiply the clock multiplier by the FSB speed.
		It is noteworthy to mention that some CPU’s are "clock locked", which means the clock multiplier can not be adjusted and therefor the only option is to increase the FSB speed and now you are overbussing.
	www.targetpc.com /hardware/articles/ocguide/part2 (1878 words)

	Mixed-Signal ICs - Si5310 Clock Multiplier
		The Si5310 is a fully integrated low-power clock multiplier and clock regenerator IC designed to provide low jitter clock synthesis/regeneration in high-speed communication systems.
		The Si5310 synthesizes an output clock in either the 150-167 MHz or the 600–668 MHz frequency range from an input clock that is an integer submultiple between 10 MHz and 311 MHz.
		Additionally, the Si5310 also regenerates a "clean" version of the input clock by using the clock synthesis phase-locked loop (PLL) to remove unwanted jitter and square up the input clock's rising and falling edges.
	www.silabs.com /tgwWebApp/public/web_content/products/Timing/Precision_Clock/en/Si5310.htm (242 words)

	Pll Clock Multiplier X2 On GlobalSpec
		RF frequency multipliers are nonlinear devices that produce an output signal with a frequency that is larger than the frequency of a corresponding input signal by a predetermined factor.
		Voltage multipliers are AC to DC conversion devices that produce high-potential DC voltage from a lower voltage, AC source.
		Network clock sources are timing devices that use a signal from an external source to set and maintain a central time for all of the elements in a network.
	rf-components.globalspec.com /Industrial-Directory/pll_clock_multiplier_x2 (1193 words)

	Overclocking
		The two main settings that are used for overclocking are the base processor speed (also called bus speed) and the clock multiplier.
		The actual frequency the processor runs at is calculated by multiplying the base frequency by the multiplier.
		If the processor cannot handle the higher frequency, the multiplier can be reduced to still run the bus at the higher base frequency.
	www.digitalstormonline.com /overclocking.asp (691 words)

	Ultra High Speed Microcontroller Hardware Enhances Serial Port Capability - Maxim/Dallas
		The addition of a clock multiplier allows the user to benefit by selecting a crystal at one-forth the original frequency to produce the same baud rates with reduced EMI.
		When the clock multiplier function was added to the high-speed microcontroller family, the selectable divide by 4 timer-input clock was modified to become a function of the system clock, not the oscillator clock.
		The clock multiplier is used for illustration and is not required to generate these system clock frequencies.
	www.maxim-ic.com /appnotes.cfm/appnote_number/600 (2679 words)

	Clock multiplier/jitter attenuator (US4805198)
		A clock multiplier/jitter attenuator circuit provides a stable clock which is a multiple frequency of the average frequency of an external digital data stream.
		The external data is written into successive storage cells of a FIFO at its own clock rate and read out of the FIFO at the rate of an internal clock signal which is formed by frequency dividing the stable clock.
		Apparatus for providing a clock signal which has low jitter and is a multiple frequency of the average frequency of an external clock exhibiting jitter, and which is tolerant to said jitter on said external clock comprising:
	www.delphion.com /details?pn10=US04805198 (457 words)

	Fighting Foreign Legion - Overclocking on the 754/939 Platform Part 3 (Site not responding. Last check: )
		When the CPU multiplier cannot be increased, adjusting the bus or ‘reference clock' is the only way to increase the CPU's operating frequency.
		It is a common misconception that the memory clock speed is simply a fraction of the reference clock speed.
		So when using a half multiplier your memory frequency is still running at a fraction of your CPU speed, however that fraction is the next highest whole multiplier value.
	teamffl.com /forum/topic.asp?TOPIC_ID=2310 (1905 words)

	Clock multiplier circumvents PLL - 5/13/1999 - EDN (Site not responding. Last check: )
		Clock multiplier circumvents PLL - 5/13/1999 - EDN
		The resultant clock signals have the same duty cycle as the incoming signal (Figure 1b).
		Figure 2 shows the internally delayed clock signals that are necessary to produce the 2X, 3X, and 4X clocks.(DI #2344).
	www.edn.com /article/CA45865.html (483 words)

	Intentional Clock Modulation
		An ideal digital clock, from the standpoint of system timing, is an infinite succession of very fast-edged, identical pulses with a perfectly repeating structure.
		When connected to a jittery clock, these transceivers may fail to lock, or lock poorly, leading to data errors or other flaky behavior.
		For direct-sequence spread-spectrum links, especially those in which the data rate and the communications-modulation rate (the chip rate) are related by a fixed integer, it is important to have a stable, jitter-free system clock for the transfer of data to and from the RF subsystem.
	www.sigcon.com /Pubs/edn/clockmod.htm (836 words)

	Clock Multiplier Question - PC-Media Tech Forums
		I thought locked CPU multipliers prevented you from making changes like this in the BIOS (If not I spent an awful lot of time looking into a magnifying glass and used an awful lot of tape and conductive goop to overclock my old XP 2000+).
		This may be premature, as I'm not at home now and when I installed the new CPU last night I didn't pay attention to the CPU speed displayed when the mobo posted, but just consider this a hypothetical.
		Yeah, if the clock multiplier on the CPU is locked, it'll just stick to 10.5 even if you up the multiplier to 12.5.
	www.pcmech.com /forum/showthread.php?t=115626 (317 words)

	FSB, Clock speed, multiplier
		I understand how the clock speed times the multiplier equals the CPU speed, and have played with increasing the clock speed using jumpers to add on those Mhz.
		Thinking about it now...it may be coincidense but it seems that the FSB is double the clock speed of the motherboard.
		The multiplier is what the frequency is multiplied by on the CPU for the working total frequency of the CPU.
	www.pcreview.co.uk /forums/thread-353.php (455 words)

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