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| | Self-Modifying Code Clear |
 | | For the Pentium 4 processor, a write or a snoop of an instruction in a code segment, where the target instruction is already decoded and resident in the trace cache, invalidates the entire trace cache. |
 | | A write to a memory location in a code segment that is currently cached in the processor causes the associated cache line (or lines) to be invalidated. |
 | | Systems software, such as a debugger, that might possibly modify an instruction using a different linear address than that used to fetch the instruction, will execute a serializing operation, such as a CPUID instruction, before the modified instruction is executed, which will automatically resynchronize the instruction cache and prefetch queue. |
| www.rz.uni-karlsruhe.de /rz/docs/VTune/reference/Self-Modifying_Code_Clear.htm (490 words) |
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