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Topic: Complex Instruction Set Computer

Related Topics

Reduced Instruction Set Computer

Explicitly Parallel Instruction Computing

RISC

Addressing mode

Instruction set

SIMD

Superscalar

Computer architecture

CDC 6600

Motorola 68000

X86

OpenVMS

Andrew Tanenbaum

Seymour Cray

Itanium

	Complex instruction set computer - Wikipedia, the free encyclopedia
		A complex instruction set computer (CISC) is a microprocessor instruction set architecture (ISA) in which each instruction can execute several low-level operations, such as a load from memory, an arithmetic operation, and a memory store, all in a single instruction.
		The compact nature of such a CISC ISA results in smaller program sizes and fewer calls to main memory, which at the time (the 1960s) resulted in a tremendous savings on the cost of a computer.
		Modern x86 processors also decode more complex instructions into series of smaller internal "micro-operations" which can thereby be executed in a pipelined (parallel) fashion, thus achieving high performance on a much larger subset of instructions.
	en.wikipedia.org /wiki/Complex_instruction_set_computer (412 words)

	Complex Instruction Set Computer
		A Complex Instruction Set Computer (CISC) is an instruction set architecture (ISA) in which each instruction can indicate several low-level operations, such as a load from memory, an arithmetic operations, and a memory store, all in a single instruction.
		Examples of CISC processors are the VAX, PDP-11, Motorola 68000 family and the Intel x86/Pentium CPUs.
		Modern "CISC" CPUs, such as recent x86 designs like the Pentium 4, whilst they usually support every instruction that their predecessors did, are designed to work most efficiently with a subset of instructions more resembling a typical "RISC" instruction set.
	www.ebroadcast.com.au /lookup/encyclopedia/ci/CISC.html (271 words)

	CISC - Complex Instruction Set Computer
		Computers with processors that use large sets of instructions for manipulating data.
		Complex instruction set computing is one of the two main types of processor design in use today.
		(complex instruction set computer) is a specific type of microprocessor which has a wide range of instructions to enable easy programming and efficient use of memory.
	www.auditmypc.com /acronym/CISC.asp (764 words)

	CISC vs RISC
		CISC is an acronym for Complex Instruction Set Computer and are chips that are easy to program and which make efficient use of memory.
		One of their key realizations was that a sequence of simple instructions produces the same results as a sequence of complex instructions, but can be implemented with a simpler (and faster) hardware design.
		Instructions can be executed and completed out-of-order, allowing the processor to have up to 32 instructions in various stages of execution At a frequency of 200 MHz, the R10000 Microprocessor delivers peak performance of 800 MIPS with a peak data transfer rate of 3~2 GBytes/second to secondary cache.
	telnet7.tripod.com /articles/cisc_risc.htm (2340 words)

	CISC Technoloty - Complex Instruction Set Computer - Computer Fundamentals - Computer Science Tutorials - Provided by ...
		Because instructions could be retrieved up to 10 times faster from a local ROM than from main memory, designers began to put as many instructions as possible into microcode.
		The instruction is decoded: the controlling code from the microprogram identifies the type of operation to be performed, where to find the data on which to perform the operation, and where to put the result.
		In an ideal CISC machine, each complete instruction would require only one clock cycle (which means that each stage would complete in a fraction of a cycle.) In fact, this is the maximum possible speed for a machine that executes 1 instruction at a time.
	www.laynetworks.com /CISC.htm (1684 words)

	Condensed microaddress generation in a complex instruction set computer - Patent 5771365 (Site not responding. Last check: 2007-10-14)
		A complex instruction set computer as recited in claims 1 or 2 wherein the N-bit addressing means addresses the sparse array for at least two execution pipelines.
		Further, the instructions typically have interdependencies; for example, an instruction which reads the value of a register is dependent on a previous instruction which writes the value to that same register the second instruction cannot execute until the first instruction has completed its write to the register.
		Instructions are passed in order from AC2 to EX (or in the case of floating point instructions, to the FPU) because integer instructions that may still cause an exception in EX are designated exclusive, and therefore are issued alone into both execution pipes, handling exceptions in order is ensured.
	www.freepatentsonline.com /5771365.html (13876 words)

	What’s the Difference Between RISC and CISC
		Another computer family that is classified as a complex instruction set computer is the Motorola 68000 family.
		Reduced instruction set machines, unlike complex instruction set machine, use same length instructions so that the instructions are aligned on word boundaries and may be fetched in a single operation [APPL].
		CISC has a large, complex instruction set, variable-length instructions, a large number of addressing modes, and a small number of general-purpose registers.
	www.cstp.umkc.edu /~mullinsj/cs282/DifferenceBetweenRISCandCISC.htm (1530 words)

	Complex Instruction Set Computer (Site not responding. Last check: 2007-10-14)
		The term was coined in contrast to Reduced Instruction Set Computer.
		It is easier to debug a complex instruction set implemented in microcode than one whose decoding is "hard-wired" in silicon.
		Examples of CISC processors are the Motorola 680x0 family and the Intel 80186 through Intel 486 and Pentium.
	burks.brighton.ac.uk /burks/foldoc/0/23.htm (178 words)

	Dual-instruction-set architecture CPU with hidden software emulation mode - Patent 5781750
		Instruction decode 14 sends the opcode field of the instruction to microcode ROM 16, and the opcode field is used to enter the microcode where a routine to execute the instruction is located.
		Instruction Pointer 34 indicates the instruction to be decoded in instruction fetch unit 32.
		Instruction decode 36 is composed of three sub-blocks, one for decoding CISC instructions, another for decoding RISC instructions, and a third sub-block for decoding extended RISC instructions for emulation mode.
	www.freepatentsonline.com /5781750.html (7677 words)

	RISC - Reduced Instruction Set Computer
		An acronym for Reduced Instruction Set Computer, a processor that uses a simplified set of internal operating instructions to speed execution.
		One advantage of reduced instruction set computers is that they can execute their instructions very fast because the instructions are so simple.
		A design philosophy for computers whereby the processor is optimized to execute a relatively small number of different instructions in a predictably small amount of time.
	www.auditmypc.com /acronym/risc.asp (712 words)

	[No title] (Site not responding. Last check: 2007-10-14)
		CISC was primarily motivated by a desire to reduce the "semantic gap" between the machine language of the processor and the high-level languages in which people were programming, the theory was that such a processor would have to execute fewer instructions and thus would have better performance.
		CISC computers are based on a complex instruction set in which instructions are executed by microcode.
		A RISC instruction set includes fewer and simpler instructions with hard-wired control, simpler processor pipeline, a larger number of registers, a smaller transistor count which makes it easier to design and cheaper to produce, and a higher clock rate etc. Since fewer instructions exist, it's also easier to write powerful optimized compilers.
	userpages.umbc.edu /~zding1/cmsc611/report.doc (3471 words)

	[No title]
		CISC(complex instruction set computer) is the traditional architecture of a computer, in which the CPU uses microcode to execute very comprehensive instruction set.
		Accordingly, they proposed using much smaller instruction sets (which are not in microcode on the chip; some RISC chips operate with as few as 34 instructions), in which each instruction is of the same length (32-bits), and hence can be executed extremely rapidly, that is, in a single "machine cycle." The smaller instructions sets...
		CISC (Complex Instruction Set Computer) It refers to a computer design that uses the full set of instructions.
	www.lycos.com /info/complex-instruction-set-computer.html (493 words)

	Glossary of terms
		The gist of it is that no dynamic instruction scheduling is performed as is done in RISC processors but rather that instruction scheduling and speculative execution of code is determined beforehand in the compilation stage of a program.
		Register file: The set of registers in a CPU that are independent targets for the code to be executed possibly complemented with registers that hold constants like 0/1, registers for renaming intermediary results, and in some cases a separate register stack to hold function arguments and routine return addresses.
		A CPU with its instruction set that is simpler in comparison with the earlier Complex Instruction Set Computers (CISCs) The instruction set was reduced to simple instructions that ideally should execute in one cycle.
	www.phys.uu.nl /~steen/web05a/glossary.html (2229 words)

	Section 4.9 (Vision) - Computers
		There are two important reasons for the increasing capacity of computers: the introduction of RISC (Reduced Instruction Set Computer) processors and the increasing application of parallel processing.
		We currently see a transition from CISC processors (Complex Instruction Set Computer), which work with a relatively large set of instructions, to RISC processors, which work with a small set of simple, basic instructions.
		Computers are increasingly applied in networks, in which different computers are allocated different roles.
	home.hetnet.nl /~daanrijsenbrij/vision/eng/vis490h1.htm (976 words)

	[No title]
		In terms of computing power, the CPU is the most important element of a computer system.
		In addition to bandwidth and clock speed, microprocessors are classified as being either RISC (reduced instruction set computer) or CISC (complex instruction set computer).
		Every computer contains an internal clock that regulates the rate at which instructions are executed and synchronizes all the various computer components.
	www.escotal.com /cpu.html (1017 words)

	Vision Engineer - Why CISC? (Site not responding. Last check: 2007-10-14)
		However, instructions in high-level languages still need to be converted into their equivalent low-level languages before the processor can execute them.
		CISC was developed to make compiler development simpler.
		Relying on a CISC processor is easy because a single instruction would be all that is needed to utilise any built-in ability.
	www.visionengineer.com /comp/why_cisc.shtml (295 words)

	CISC (Complex Instruction Set Computer) (Linktionary term) (Site not responding. Last check: 2007-10-14)
		The richer the instruction set, the easier it is to write programs for the microprocessor, but a rich set of microcode can affect performance.
		CISC (Complex Instruction Set Computer) designs include a rich set of microcode that simplifies the creation of programs that run on the processor.
		RISC (Reduced Instruction Set Computer) designs, as the name implies, have a reduced set of instructions that improves the efficiency of the processor but requires more complex external programs.
	www.linktionary.com /c/cisc.html (218 words)

	Instruction Set Complexity: CISC vs. RISC
		This tradeoff in basic instruction set design philosophy is reflected in the two main labels given to instruction sets.
		CISC stands for complex instruction set computer and is the name given to processors that use a large number of complicated instructions, to try to do more work with each one.
		RISC stands for reduced instruction set computer and is the generic name given to processors that use a small number of simple instructions, to try to do less work with each instruction but execute them much faster.
	www.pcguide.com /ref/cpu/arch/int/instComplexity-c.html (457 words)

	The Ultimate RISC
		This is a complex instruction with 3 address fields (reducable to two if an accumulator is used), and the conditional branch phase of each instruction cycle depends on the results of the subtract phase of that instruction, inhibiting pipelined execution.
		The control unit for the instruction execution unit shown in Figure 2 is quite simple both because there is no problem of opcode decoding and because there are no conditional operations in the instruction execution cycle.
		Some early drum machines, such as the British DEUCE computer, circa 1955, encoded the data part of their instruction set as a series of move instructions, but these machines typically also included a next-address field in each instruction, making them quite different from pure move machines.
	www.cs.uiowa.edu /~jones/arch/risc (2609 words)

	What is CISC? - a definition from Whatis.com - see also: complex instruction set computer
		The term "CISC" (complex instruction set computer or computing) refers to computers designed with a full set of computer instructions that were intended to provide needed capabilities in the most efficient way.
		Later, it was discovered that, by reducing the full set to only the most frequently used instructions, the computer would get more work done in a shorter amount of time for most applications.
		Since this was called reduced instruction set computing (RISC), there was now a need to have something to call full-set instruction computers - thus, the term CISC.
	whatis.techtarget.com /definition/0,,sid9_gci213854,00.html (210 words)

	Chipdir
		Instruction counts on real programs being executed on CISC* (complex instruction set computers) show, that around 90% of the instructions that are executed are simple anyway.
		Except for some simple memory addressing instructions, that have the address to act on calculated in registers using the normal instructions.
		Another aspect is, that difficult instructions like call, push and return disappear, since they involve auto incrementing or decremting the stack pointer.
	www.xs4all.nl /~ganswijk/chipdir/txt/risc.htm (533 words)

	CISC at CodePedia
		A CISC microprocessor design provides many instructions in order to ease programming.
		Of course, the many similar yet different instructions complicates instruction decoding by the microprocessor, so you pay the semplification in program writing with lower performances and higher costs.
		CISC processors generally feature variable-length instructions, multiple addressing formats, and contain only a small number of general-purpose registers.
	www.codepedia.com /1/CISC (152 words)

	R4300i MICROPROCESSOR
		In the R4300i, the instruction and data caches are each split into four banks; only one of the four banks in the instruction or data caches is powered up at any one time.
		As instruction reads are usually sequential, the R4300i fetches two consecutive 32-bit words (instructions) every time it reads the instruction cache.
		Instruction cache size impacts performance to a greater extent owing to locality of instruction code.
	www.futuretech.blinkenlights.nl /prod_overview_book.html (2849 words)

	[No title] (Site not responding. Last check: 2007-10-14)
		Large number of instruction formats.¡f!>¡!3Ì3þ A'EÿÿþA¡Aóü´¨& Introduction to Computer Architecture¨Complex Instruction Set Computer VAX 11/780 Architectural Features It is a 32-bit machine.
		This was achieved by supporting a large variety of instructions and addressing modes.
		Micro instructions should not be faster than simple instructions.
	www.cse.psu.edu /~cg431h/Unit2.cisc.risc.ppt (282 words)

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