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	Data bus - Computing Reference - eLook.org
		The bus (connections between and within the CPU, memory, and peripherals) used to carry data.
		The width and clock rate of the data bus determine its data rate (the number of bytes per second it can carry), which is one of the main factors determining the processing power of a computer.
		Some processors have an internal data bus which is wider than their external bus in order to make external connections cheaper while retaining some of the benefits in processing power of a wider bus.
	www.elook.org /computing/data-bus.htm (114 words)

	Encyclopedia: Data bus (Site not responding. Last check: 2007-10-08)
		Buses can be parallel buses, which carry data words striped across multiple wires, or serial buses, which carry data in bit-serial form.
		As data rates increase, the problems of timing skew and crosstalk across parallel buses become more and more difficult to circumvent.
		Often, a serial bus can actually be operated at higher overall data rates than a parallel bus, despite having fewer electrical connections, because a serial bus inherently has no timing skew or crosstalk.
	www.nationmaster.com /encyclopedia/Data-bus (1951 words)

	Front side bus - Wikipedia, the free encyclopedia
		Front Side Bus (FSB) is the term used to describe the CPU data bus.
		This bus and the cache memory connected to it is faster than accessing the system RAM via the front side bus.
		With bus speeds increasing rapidly, it is sometimes necessary to run the RAM at a lower frequency than the system bus in order to stay within the limitations of the DRAM modules on the memory stick.
	en.wikipedia.org /wiki/Front_side_bus (967 words)

	TechFest - PCI Local Bus Technical Summary
		In PCI terminology, data is transferred between an initiator which is the bus master, and a target which is the bus slave.
		The current initiator's bus transfers are overlapped with the arbitration process that determines the next owner of the bus.
		Unlike the 64-bit data bus option which requires a longer connector with an additional 32-bits of data signals, 64-bit addressing can be supported through the base 32-bit connector.
	www.techfest.com /hardware/bus/pci.htm (4674 words)

	Computer bus -- Facts, Info, and Encyclopedia article (Site not responding. Last check: 2007-10-08)
		In ((computer science) the structure and organization of a computer's hardware or system software) computer architecture, a bus is a subsystem that transfers data or power between computer components inside a (A machine for performing calculations automatically) computer or between computers.
		The classic, simple way to prioritise interrupts or bus access was with a (Flower chain consisting of a string of daisies linked by their stems; worn by students on class day at some schools) daisy chain.
		The former referred to bus systems that were designed to be used with internal devices, such as graphics cards, and the latter to buses designed to add external devices such as (An electronic device that generates a digital representation of an image for data input to a computer) scanners.
	www.absoluteastronomy.com /encyclopedia/c/co/computer_bus.htm (2490 words)

	Fast Accurate Memory Test Suite - RAM, SRAM, DRAM, address bus, data bus
		That's because the address bus test assumes a working data bus, and the device test results are meaningless unless both the address and data buses are known to be good.
		By looking at the data value or address at which the test failed, he or she should be able to quickly isolate the problem on the circuit board.
		The number of data values to test is the same as the width of the data bus.
	www.netrino.com /Articles/MemoryTesting (4125 words)

	Data Bus
		The bus is the pathway -- on the motherboard and beyond -- that allows data to flow from one part of your computer system to another.
		The data bus is important because it's one of the three components that most affect the overall performance of any system (the others being the CPU and the amount of RAM).
		Transmission speed is measured in megabits per second (or Mbps), which refers to the amount of data that can be moved in a second.
	tms.ecol.net /computer/pdatbus.htm (507 words)

	Enhanced 64-Bit Data Bus (Site not responding. Last check: 2007-10-08)
		The data bus is the highway that carries information between the processor and the memory subsystem.
		This wider data bus facilitates high-speed processing by maintaining the flow of instructions and data to the processor's superscalar execution unit.
		Bus cycle pipelining allows a second cycle to start before the first one is completed.
	ponce.inter.edu /whoiswho/organiza/abacus/ismael/64data.html (219 words)

	Matching Data Bus Throughput To Data Acquisition Needs
		For data transfer, the PC had a 16-bit internal data bus; but for cost and compatibility reasons, the external data bus was only 8 bits wide.
		Bus mastering allows an adapter to hijack the data bus temporarily by bidding for and gaining control of the bus to perform a specific task.
		Yet in high-speed data acquisition applications, the method of data transfer between the data acquisition board and computer memory or the monitor is just as important as the speed of the ADC or DAC.
	www.evaluationengineering.com /pctest/articles/e707data.htm (1806 words)

	The Data Bus/Address Bus (Site not responding. Last check: 2007-10-08)
		In the same way as an urban bus stops at various locations to pick up or drop off passengers, the computer's buses also have certain "bus stops" at which they call, and where addresses or data can hop on or be deposited.
		The data bus is also a collection of wires but this carries instructions and data, not memory addresses.
		The data and instructions are transported over the data bus to or from that specified location.
	www.cs.ualberta.ca /~casey/c101/101notes/bus.html (319 words)

	Information about the computer BUS
		A computer bus is a method of transmitting data from one part of the computer to another part of the computer.
		When this bus was originally released it was a proprietary bus, which allowed only IBM to create peripherals and the actual interface.
		VLB 2.0 was later released in 1994 and had a 64-bit bus and a bus speed of 50 MHz.
	www.computerhope.com /help/bus.htm (1086 words)

	[No title] (Site not responding. Last check: 2007-10-08)
		The data bus is a bi-directional path for data and instructions.
		By increasing the width of the data bus more data can be carried at the same time, reducing the nuber of fetches required and hence increasing the speed.
		If the width of the data bus is the same as the word size then a word of data can be transferred in one go.
	www.groovyweb.uklinux.net /pages/Data,%20address,%20and%20control%20busses (213 words)

	data bus - Hutchinson encyclopedia article about data bus
		In computing, the electrical pathway, or bus, used to carry data between the components of the computer.
		All content on this website, including dictionary, thesaurus, literature, geography, and other reference data is for informational purposes only.
		This information should not be considered complete, up to date, and is not intended to be used in place of a visit, consultation, or advice of a legal, medical, or any other professional.
	encyclopedia.farlex.com /data+bus (78 words)

	bus from FOLDOC (Site not responding. Last check: 2007-10-08)
		The data bus, address bus and control signals, despite their names, really constitute a single bus since each is useless without the others.
		Some processors have internal busses which are wider than their external busses (usually twice the width) since the width of the internal bus affects the speed of all operations and has less effect on the overall system cost than the width of the external bus.
		This was once written "'bus bar" as it was a contraction of "omnibus bar" - a connection bar "for all", by analogy with the passenger omnibus - a conveyance "for all".
	wombat.doc.ic.ac.uk /foldoc/foldoc.cgi?query=Bus&action=Search (308 words)

	Data Translation Unveils Industry's Lowest-Priced PCI Bus-Mastering Data Acquisition Board (Data Translation, Inc. ... (Site not responding. Last check: 2007-10-08)
		Data Translation Inc. (NASDAQ: DATX) today announced a new series of multifunction PCI data acquisition boards, including the lowest-priced PCI bus-mastering data acquisition board available on the market.
		Users can acquire data using post-trigger mode (data is acquired after the trigger), pre-trigger mode (data is acquired up until the trigger), or about-trigger (data is acquired both before and after the trigger).
		Data Translation, Inc. (NASDQ: DATX) is a world leader in the design, manufacture and marketing of high-performance data acquisition, imaging, and digital signal processing, video capture and editing hardware and software systems.
	www.opendaq.org /members/datatran/press/dt000002.htm (861 words)

	PC KITS-tutorial page (ISA BUS)
		The DMA (Direct Memory Access) controller borrows the address bus, the data bus and the control bus from the system and transfers a programmed series of bytes from a fast I/O device to the memory.
		When a device has a data block ready to be send to the memory, sends a DMA request asserting a DRQn signal to the DMA controller.
		When the data transfer is completed unasserts the HRQ signal and the processor gets the control of the buses again.
	www.ctv.es /pckits/tISA.html (1206 words)

	SCSI Bus P Connector Pin Out and Signal Names, Pinout Information
		With SCSI-2 the "A" may be used alone or with the "B" cable to provide "WIDE" SCSI allowing a 16 or 32 bit data bus.
		On SCSI-3, the "A" cable may be used for an 8 bit data bus.
		Also the bus may be either Single ended or Differential; however the two are mutually exclusive SCSI is a chained parallel bus, cables start at the Host and run from device to device in a chain.
	www.interfacebus.com /Design_SCSI_P_Connector.html (317 words)

	What is bus? - A Word Definition From the Webopedia Computer Dictionary
		This is a bus that connects all the internal computer components to the CPU and main memory.
		On PCs, the old ISA bus is being replaced by faster buses such as PCI.
		The local bus is a high-speed pathway that connects directly to the processor.
	www.webopedia.com /TERM/b/bus.html (652 words)

	TechFest - ISA Bus Technical Summary
		Over time various ISA bus specifications were produced in an attempt to alleviate the compatibility problems.
		These signals are gated on the system bus when BALE is high and are latched on the falling edge of BALE.
		I/O Write is driven by the owner of the bus and instructs the selected I/O device to capture the write data on the data bus.
	www.techfest.com /hardware/bus/isa.htm (1764 words)

	CG152 - Assessment Details - 1998 question 2 (Site not responding. Last check: 2007-10-08)
		State the storage capacity of the memory IC in Figure 2.2, and explain how this may be connected into a microprocessor system which has a 32-bit address bus, and a 32-bit data bus.
		The column I/O is used to pass the value of the column lines to the data bus (on a read), or to pass the value of the data bus to the column lines (on a write).
		The R/W line is used to determine the operation of the column I/O and is also connected to all the memory cells to determine their operation in a particular cycle.
	www.dcs.warwick.ac.uk /cg152/SampleExam/1998q2.html (484 words)

	Software-Based Memory Testing - Data Bus Test
		The name of this test, walking 1's, comes from the fact that a single data bit is set to 1 and "walked" through the entire data word.
		to n, where n is the width of the data bus.
		To perform the walking 1's test, simply write the first data value in the table, verify it by reading it back, write the second value, verify, etc. When you reach the end of the table, the test is complete.
	www.esacademy.com /faq/docs/memtest/data.htm (579 words)

	Data Bus
		Data bus architectures use 16, 32 or 64 bit data paths.
		It appears that PCI may eventually replace the older ISA bus and is competing with VME for industrial use.
		Industry Standard Architecture (ISA) bus This bus architecture was developed by IBM for the PC/XT and PC/AT and adopted for industrial applications.
	www.fas.org /man/dod-101/sys/ac/equip/bus.htm (806 words)

	Avionics Data Bus Descriptions
		A serial bus using only a few sets of wires keeps the point to point wiring and weight down to a minimum.
		The strobe changes when the data remains constant between bit intervals ~ the clock may be recovered by XORing the Data and Strobe lines (also used by IEEE-1355, and IEEE-1394).
		The interface is dual redundant with between 2 and 32 interface devices on the bus.
	www.interfacebus.com /Design_Connector_Avionics.html (983 words)

	Buffering the data bus (Site not responding. Last check: 2007-10-08)
		I understand that the Etrax100 electrical specs are valid for a load on the data bus of 50pF per line.
		One for the EDO dynamic RAM and one for the Flash RAM, SRAM and peripherals.
		The Buffer on the data bus to the peripherals will normally point outwards from the Etrax to the memory and peripherals.
	mhonarc.axis.se /dev-etrax/msg00075.html (248 words)

	SBS Technologies > Data Bus Analysis Software: PASS, DataXpress
		Utilizing an improved interface and EU conversions, PASS 3200 is easy to use and allows intuitive interpretation of bus data.
		PASS 3200 is the new generation of SBS bus analyzer capability.
		Monitoring bus traffic with the PASS 3200 is designed to be simple to use and interpret utilizing the new Graphical Displays.
	www.sbs.com /products/family/15 (176 words)

	CAN Data Bus - Controller Area Network
		Data capacity per CAN message is 8 bytes.
		Wiring from sensors only needs to extend to the nearest control unit, where the monitored data are processed to generate data telegrams for transmission to the CAN data bus.
		Actuators can also receive control signals from a different control unit which receives the data telegram through the CAN bus and then uses this information to calculate a control parameter for the actuator.
	www.launch-techs.com /Support/Info/can-bus.htm (446 words)

	Aeroflex Incorporated: Products \| Avionics \| Data Bus Analyzers
		Aeroflex’s Data Bus Analyzers are some of the most advanced and easy to use analyzers on the market today.
		Our DT350H Handheld ASCB Data Bus Analyzer is a portable, battery operated, handheld analyzer supporting all versions of the Honeywell/GAMA ASCB Bus.
		The DT400 ARINC 429 Data Bus Analyzer sets a standard for ARINC 429 data bus test equipment in the field or shop.
	www.aeroflex.com /products/avionics/databus/databus.cfm (111 words)

	The educational encyclopedia, data communication, bus systems, profibus, bitbus, canbus, educypedia, modbus (Site not responding. Last check: 2007-10-08)
		CAN controller area network the Controller Area Network (CAN) is a high-integrity serial data communications bus for real-time applications, operates at data rates of up to 1 Megabits per second, has excellent error detection and confinement capabilities, was originally developed for use in cars
		Modbus the modbus protocol is a messaging structure, widely used to establish master-slave communication between intelligent devices.
		VAST bus the VAST bus uses a serial protocol on a 10-wire...
	users.pandora.be /educypedia/computer/datacommunicationbus.htm (718 words)

	NBC 17 - News - Arrest Made In Area Where DATA Bus Shooting Occurred (Site not responding. Last check: 2007-10-08)
		No one in the house was injured, but as officers were taking the report they learned that a Durham Area Transit Authority bus had been struck by a bullet as the vehicle traveled on Leon street at about the same time.
		Three passengers on the bus suffered minor injuries caused by flying glass and were treated at the scene.
		Burwell has not been charged with shooting into the DATA bus or the house in the 800 block of Leon Street, but detectives are investigating whether those cases are related to the incidents in the 1200 block of Leon Street.
	www.nbc17.com /news/3981752/detail.html (394 words)

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