| | United States Patent: 6,380,765 (Site not responding. Last check: 2007-10-26) |
 | | The complementary integrated circuit of claim 22, wherein the depletion mode channel region separating the source and the drain regions is controlled by a potential range of less than 0.5 Volts applied to at least one of the number of vertical gates. |
 | | The channel is uniformly depletion mode or normally "on" and can conduct with zero potential applied to the conductive nodes A, B, C, and D. In operation, the conductive nodes A and C serve as multiple logic inputs, or active inputs, and can effect conduction in the depletion mode channel. |
 | | That is the vertical gates separated from the horizontal depletion mode channel by a first thickness insulator material serve as active inputs and the vertical gates separated from the horizontal depletion mode channel by a second thickness insulator material serve as passing gates connected to passing logic input lines. |
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