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Topic: Die (integrated circuit)

    Note: these results are not from the primary (high quality) database.

US06945712-20050920.html a die-bonded assembly, the die-bonded assembly comprising an optoelectronic circuit die that is die-bonded to a logic integrated circuit die, the optoelectronic circuit die comprising a light generating device and a photodetector device, the logic integrated circuit die having an upper surface oriented substantially in a plane; and Fiber optic field programmable gate array integrated circuit packaging An apparatus for connecting to an external fiber optic cable, the apparatus comprising: www.uspto.gov /web/patents/patog/week38/OG/html/1298-3/US06945712-20050920.html   (78 words)

Integrated Circuit Packaging Electronic and IC Packaging Services (23 companies) Integrated circuit packaging is the final stage of semiconductor device fabrication in which the bare die or bare boards are placed inside of a... Electronic and IC Packaging Services (21 companies) Integrated circuit packaging is the final stage of semiconductor device fabrication in which the bare die or bare boards are placed inside of a... Electronic and IC Packaging Services (21 suppliers) - Integrated circuit packaging is the final stage of semiconductor device fabrication in which the bare die or bare boards are placed inside of a... www.bocamicro.com /integratedcircuits/integratedcircuitpackaging   (1228 words)

PATENTS Integrated circuit die or dies discrete electrical components such as chip carriers, resistors, etc. may be mounted to faces of the body and a lid may be provided for hermetic encapsulation of integrated circuit die between lids and respective faces of the body. A multifaceted package is disclosed that permits VLSI and VHSIC integrated circuits in the form of integrated circuit die or chip carries to be mounted on the faces of the package to form a high-density circuit package. A structure for packaging semiconductor integrated circuits including a ceramic housing consisting of a base and cap having opposed mating surfaces for subsequent mating during a cap-to-base sealing operation that encapsulates an integrated circuit within the ceramic housing. www.polese.com /patents.htm   (1674 words)

Collected Bibliography on 3D Packaging - 602652 Kbyte The circuit parameters are extracted from the solved current distribution in the form of either S-parameters frequency response and RLC-equivalent circuit in SPICE format. The materials used in the package consisted of a copper or an alloy 42 lead frame, a standard conductive die-attach adhesive or a special low stress type of die-attach adhesive and a standard moulding compound or a low stress compound. Simulations focused on the six printed circuit board regions where approximately 37 W of power was generated on the component side of the board. www.eleceng.adelaide.edu.au /Personal/alsarawi/node81.html   (11653 words)

United States Patent Application: 0040097009 Flip-chip semiconductor assemblies, each including integrated circuit (IC) dice and an associated substrate, are electrically tested before encapsulation using an in-line or in-situ test socket or probes at a die-attach station. Those assemblies using "wet" quick-cure epoxies for die-attachment may be tested prior to the epoxy being cured by pressing the integrated circuit (IC) dice against interconnection points on the substrate for electrical connection, while those assemblies using "dry" epoxies may be cured prior to testing. The repaired assembly 32 then proceeds to encapsulation (or some other form of sealing) and, eventually, is shipped to customers along with those assemblies 32 that passed the testing the first time through. appft1.uspto.gov /netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PG01&p=1&u=/netahtml/PTO/srchnum.html&r=1&f=G&l=50&s1="20040097009".PGNR.&OS=DN/20040097009&RS=DN/20040097009   (2273 words)

Cadence Unveils Software for Gigabit-Speed PCB Systems Design Now, for the first time, engineers have an integrated environment for designing and implementing gigabit serial interfaces in high speed PCB systems through a simulation and constraint-driven differential interconnect implementation from die-to-die across all three system fabrics: silicon, IC Package, and PCB. Key to successful gigabit serial interface design is the creation, constraint, simulation and management of differential signals throughout the entire design flow. New capabilities in PCB Librarian Expert 15.0 address process bottlenecks created as librarians manually struggle to enter, create and validate component data for the large pincount devices common in today's designs. www.embeddedstar.com /press/content/2003/7/embedded9706.html   (931 words)

83956.031009&ELEMENT_SET=DECL The integrated circuit package of claim 1, wherein said semiconductor die is electrically connected to said substrate by a direct chip attachment. The integrated circuit package of claim 1, wherein said thermally conductive element is made of a material from a group consisting of alumina, aluminum nitride, beryllium oxide, ceramic material, copper, diamond compound, and metal. The integrated circuit package of claim 11, wherein said thermally conductive element is made of a material from a group consisting of alumina, aluminum nitride, beryllium oxide, ceramic material, copper, diamond compound, and metal. www.wipo.int /cgi-pct/guest/getbykey5?KEY=03/83956.031009&ELEMENT_SET=DECL   (3045 words)

83956.031009&ELEMENT_SET=DECL The integrated circuit package of claim 1, wherein said semiconductor die is electrically connected to said substrate by a direct chip attachment. The integrated circuit package of claim 1, wherein said thermally conductive element is made of a material from a group consisting of alumina, aluminum nitride, beryllium oxide, ceramic material, copper, diamond compound, and metal. The integrated circuit package of claim 11, wherein said thermally conductive element is made of a material from a group consisting of alumina, aluminum nitride, beryllium oxide, ceramic material, copper, diamond compound, and metal. www.wipo.int /cgi-pct/guest/getbykey5?KEY=03/83956.031009&ELEMENT_SET=DECL   (3045 words)

Microelectronics Packaging - Dow Corning Integrated circuit packages gain full compliancy, outstanding stress relief, and reliability over a wide temperature range and moisture resistance when using Dow Corning® brand silicone die attach and encapsulation products. Improve your integrated circuit packaging and protection by using a wide range of ultra-high-purity materials from Dow Corning. We help you invent the future is a trademark of Dow Corning Corporation. www.dowcorning.com /content/etronics/etronics_si_ccs3.asp   (145 words)

Mixed-signal circuit - Wikipedia, the free encyclopedia Mixed-signal circuits refers to integrated circuits (ICs) which have both analog circuits and digital circuits combined on a single semiconductor die. Until the mid-1990s, "mixed-signal" usually meant ADC, DAC, modem, electronic power supply, or digital buffer integrated circuits. Analog circuit design can not generally be automated to nearly the extend that digital circuit design can. en.wikipedia.org /wiki/Mixed-mode_integrated_circuit   (145 words)

Non-destructive Evaluation of the Interface Between Silicon Dies and Copper Leadframes in Integrated Circuit Packaging -- Abdul et al. 44 (2): 113 -- Experimental Mechanics Non-destructive Evaluation of the Interface Between Silicon Dies and Copper Leadframes in Integrated Circuit Packaging -- Abdul et al. Non-destructive Evaluation of the Interface Between Silicon Dies and Copper Leadframes in Integrated Circuit Packaging The silicon die and copper leadframe in integrated circuit (IC) exm.sagepub.com /cgi/content/abstract/44/2/113   (211 words)

IC Packaging/Assembly Contract Manufacturing Information at Business.com Provider of integrated circuit test and assembly services that include burn-in, tape and reel, wafer grinding, dicing saw and die waffle packaging. A full-function integrated circuit packaging and contract manufacturing service house. Manufacturer of printed circuit boards, transmission modules, battery cables and relays. www.business.com /directory/electronics_and_semiconductors/semiconductors/electronics_packages/contract_manufacturers   (586 words)

Mixed-signal circuit - Wikipedia, the free encyclopedia Mixed-signal circuits refers to integrated circuits (ICs) which have both analog circuits and digital circuits combined on a single semiconductor die. Analog circuit design can not generally be automated to nearly the extent that digital circuit design can. Digitally controlled sound chips are also mixed-signal circuits. en.wikipedia.org /wiki/Mixed-mode_integrated_circuit   (232 words)

Majelac Technologies - IC Assembly and Packaging Services Wafer Dicing, Die Bonding, Wire Bonding, Sorting, and Encapsulation are performed in a class 10000 clean room. We also utilize a class 1000 clean room and clean hoods for more critical applications. www.majelac.com   (210 words)

A Low Power Application-Specific Integrated Circuit (ASIC) implementation of Wavelet Transform/Inverse Transform - Storming Media Implementing the design using a dedicated ASIC enhances the speed, decreases chip count to a single die, and uses significantly less power compared to the FPGA implementation. ASIC operations include performing the Haar wavelet transform on a 512 by 512 square pixel image, preparing the image for transmission by quantizing and thresholding the transformed data, and performing the inverse Haar wavelet transform, returning the original image with only minor degradation. A reduction of RAM accesses was realized and a tradeoff between states and duplication of components for parallel operation were key to the performance gains. www.stormingmedia.us /25/2591/A259193.html   (257 words)

yet2.com - TechPak - Semiconductor die packaging tub having angularly offset pad-to-pad via structure configured to allow three-dimensional stacking and electrical interconnections among multiple identical tubs Semiconductor die packaging tub having angularly offset pad-to-pad via structure configured to allow three-dimensional stacking and electrical interconnections among multiple identical tubs yet2.com - TechPak - Semiconductor die packaging tub having angularly offset pad-to-pad via structure configured to allow three-dimensional stacking and electrical interconnections among multiple identical tubs Enter a keyword or phrase below, and search now to find other technologies of interest. www.yet2.com /app/utility/external/indextechpak/24579   (175 words)

Semiconductor OneSource: Semiconductor Glossary -- Search For : die process of cutting wafer into dies (chips) each containing a complete semiconductor device/circuit. a single piece of semiconductor containing entire integrated circuit which has not yet been packaged; equivalent term - chip. process of cutting semiconductor wafer into individual chips following completion of device (both discreet and integrated) manufacturing; in the case of large diameter wafer dicing is carried out by partially cutting the wafer along preferred crystallographic planes using high precision saw with ultra-thin diamond blade. semiconductorglossary.com /?searchterm=die   (134 words)

Mixed-signal circuit - Wikipedia, the free encyclopedia Mixed-signal circuits refers to integrated circuits (ICs) which have both analog circuits and digital circuits combined on a single semiconductor die. It has been suggested that this article or section be merged with Mixed-signal integrated circuit. Digitally controlled sound chips are also mixed-signal circuits. en.wikipedia.org /wiki/Mixed-mode_integrated_circuit   (232 words)

MicroCircuit Engineering - Thick film, Asic design, Nuclear event detectors Obsolete Product Replacement MCE is uniquely positioned to provide solutions hybrid circuit, to the growing problem of replacing obsolete components of the same footprint and dimensions through multi chip module, last time buy wafer procurement, device replication, customised FPGAs, custom packaging of bare die and hybrid circuits. Micro Circuit Engineering (MCE) covers the following four micro circuit engineering, main product areas: Application Specific Integrated Circuits (ASICs) MCE Tewkesbury specialises in thick film, the design and supply of digital, linear and mixed signal Application Specific Integrated Circuits (ASICs). Micro Circuit Engineering makes hybrid circuits, asics, multi chip modules (mcms), thick film, databus products (mil std 1553, arinc 429, ebr), nuclear event detectors, custom power supplies and solutions to electronic component obsolescence. www.mceltd.co.uk   (232 words)

Circuit - Computing Reference - eLook.org An integrated circuit (IC) contains components built on a Silicon die. A communications path in a circuit switching network. The term is used loosely for any device or subsystem using electrical or electronic components. www.elook.org /computing/circuit.htm   (56 words)

ICOS Vision Systems Wins Key Contract for Component Inspector - Machine Vision Online The Company's two- and three-dimensional inspection products are used world-wide to inspect integrated circuits at various stages of their manufacturing process and to align electronic components and printed circuit boards. The Company has three product lines: board-level products to be integrated in die bonding equipment and in pick-and-place machines, system-level products to be integrated in test handlers, molding equipment, trim-and-form equipment, marking systems and tape-and-reel equipment and stand-alone inspection machines. ICOS is a leading world-wide developer and supplier of machine vision and inspection solutions primarily for use in the back-end semiconductor manufacturing and electronic assembly industries. www.machinevisiononline.org /public/articles/details.cfm?id=1157   (480 words)

✓ Mikroelektronik - Weltraummedizin.de - Weltraummedizin Kundenspezifische Integrierte Schaltung (ASIC - application specific integrated circuit) - ein Logikschaltkreis, dessen Funktion ebenfalls fest definiert ist, der aber speziell für einen Kunden bzw. Ein IDM erstellt das Produktdesign, entwickelt die Fertigungstechnologie, fertigt das Bauteil und verkauft es selbst. Geschäftsmodelle: Wie in vielen anderen Branchen auch gibt es den Vollhersteller - Integrated Device Manufacturer (IDM) genannt. weltraummedizin.de /index.php/Mikroelektronik   (3949 words)

Die - Wikipedia, the free encyclopedia Die, integrated circuit unit resulting from the die cutting of a wafer Die, Drôme, a commune and sous-préfecture of France DIE, the German Language acronym for Deutsches Institut für Entwicklungspolitik or German Development Institute en.wikipedia.org /wiki/Die   (124 words)

Die - Wikipedia, the free encyclopedia Die, integrated circuit unit resulting from die cutting a wafer Die, Drôme, a commune and sous-préfecture of France Die (plural dice), a polyhedral object used in games en.wikipedia.org /wiki/Die   (116 words)

Semiconductor-die cutting - Wikipedia, the free encyclopedia In the manufacturing of micro-electronic devices, die cutting or dicing is a process of reducing a wafer containing multiple identical integrated circuits to dice each containing one of those circuits. During this process, a wafer with up to thousands of circuits is cut into individual pieces, each called a die. In between the functional parts of the circuits, a thin non-functional spacing is foreseen where a saw can safely cut the wafer without damaging the circuit. en.wikipedia.org /wiki/Die_cutting   (166 words)

Patents 5739362 - 5739619 Patent 5739589: Semiconductor integrated circuit device process for fabricating the same and apparatus for fabricating the same Patent 5739591: Semiconductor device with a carrier body on which a substrate with a semiconductor element is fastened by means of a glue layer and on which Patent 5739580: Oxide formed in semiconductor substrate by implantation of substrate with a noble gas prior to oxidation www.everypatent.com /idx/pdir2348.html   (7899 words)

30913.980716&ELEMENT_SET=DECL Fiducial 401 includes diffusion regions 407A, 409A, 411 A, 407B, 409B and 411 B which are floating diffusions disposed in the substrate (not shown) of the integrated circuit die. Fiducial 301 is formed in an integrated circuit die in a fiducial region disposed between dotted lines 303 and 305 of Figure 3. Fiducial 301 is configured to be exposed from the back side 331 of the integrated circuit die by removing substrate 313 and diffusion regions 307, 309 and 311. www.wipo.int /cgi-pct/guest/getbykey5?KEY=98/30913.980716&ELEMENT_SET=DECL   (3071 words)

United States Patent: 6,432,753 In view of the above, it can be seen that this invention presents a significant advancement in the art of minimizing package-shift effects in integrated circuits. The method according to claim 1 wherein the step of forming an IC die comprises forming an IC die having a bandgap circuit. From the planarized to the metallic overcoat dies, the mean improved by 37% and the standard deviation improved by 36% while improving 47% and 48% respectively, relative to non-planarized dies. users.ece.gatech.edu /rincon-mora/patents/p6432753.htm   (3653 words)

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