Dual-ported RAM - Factbites

Dual-ported RAM - Factbites
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Topic: Dual-ported RAM

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	Video RAM - Wikipedia, the free encyclopedia
		The term VRAM is used more specifically to describe a type of dual-ported RAM used in high performance raster graphics hardware.
		Video RAM (VRAM) is a term generally used in computers to describe RAM dedicated to the purpose of displaying bitmap graphics in raster graphics hardware.
		Video RAM is usually physically separate from the main RAM residing in a computer system.
	en.wikipedia.org /wiki/VRAM (309 words)

	Dual-ported RAM - Wikipedia, the free encyclopedia
		Video RAM or VRAM is a common form of dual-ported dynamic RAM mostly used for video memory, allowing the CPU to draw the image at the same time the video hardware is reading it out to the screen.
		Dual-ported RAM (DPRAM) is a type of Random Access Memory that allows multiple reads or writes to occur at the same time, or nearly the same time, unlike single-ported RAM which only allows one access at a time.
		Apart from VRAM, most other types of dual-ported RAM are based on static RAM technology.
	en.wikipedia.org /wiki/Dual-ported_RAM (128 words)

	Random Access Memory - Wikipedia, the free encyclopedia
		RAM is usually used for primary storage in computers to hold actively-used and actively-changing information, although some devices use certain types of RAM to provide long term secondary storage.
		One defining characteristic of RAM is that its accesses to different memory locations are almost always completed at about the same speed, in contrast to some other technologies that required a certain delay time for a bit or byte to “come around”.
		Modern RAM generally stores a bit of data as either a charge in a capacitor, as in dynamic RAM, or the state of a flip-flop, as in static RAM.
	www.sevenhills.us /project/wikipedia/index.php/Random_access_memory (842 words)

	Method and apparatus for generating a repetitive serial pattern using a recirculating shift register - Patent 4513392
		Dual ported sector RAM 241 is used as an intermediate storage of the disk data as it is transferred between clustered display controller 107 and disks 102 and 103.
		Dual ported sector RAM 241 is a 1K by 8 bit memory that is used to store sectors of disk data which are being written onto disk 201 or 203 or sectors of disk data read from disk 201 or 203.
		By splitting the format operation into three passes, the 1,024 bytes of information available in the dual ported sector RAM 241 is more than sufficient to format the disk and to do normal read and write operations from and to the disk.
	www.freepatentsonline.com /4513392.html (10394 words)

	Dual-ported RAM : VRAM
		Dual-ported RAM is a type of RAM memory that allows multiple reads or write to occur at the same time, or nearly the same time.
		VRAM is a common form of dual-ported RAM mostly used for video memory, allowing the CPU to draw the image at the same time the video hardware is reading it out to the screen.
		Most RAM only allows one access at a time.
	www.city-search.org /vr/vram.html (273 words)

	MacKiDo/Dojo/RAM
		RAM used to be sold as separate chips you put into little sockets individually.
		RAM is where you work on things.The larger the desktop, the more different things you can see and be working on at once, without having to put something away or covering it up with something else.
		RAM fails so rarely that this is just anachronistic paranoia held-out from the old days (10-20+ years ago) when RAM was not as reliable as it is today.
	www.mackido.com /Hardware/RAM.html (2419 words)

	PACT Technology: Processor Model
		RAM : The dual ported RAM has two separate ports for independent read and write operations.
		The RAM Elements (ALU-PEs) are arranged at the edges of the array and are nearly identical to the ALU PEs, however the ALU is replaced by a memory.
		The RAM can be configured to FIFO Mode (no address inputs needed) or RAM with 9 or more address inputs.
	www.pactcorp.com /xneu/px_ramel1.html (131 words)

	CPI Library Developer's Reference Manual (6436-16): cpi_write_dpr
		All dual-ported RAM is used for messaging and should not be written directly.
		Writes to the dual-ported RAM of the CP indicated by the specified handle.
		Offset into dual-ported RAM where data is written.
	www.nmscommunications.com /manuals/6436-16/cpiwritedpr.html (79 words)

	OLYMPUS MIC-D: Integrated Circuit Gallery - Dual-Ported RAM Controller
		Also known as shared-storage interface chips, dual-ported RAM controllers provide more efficient use of on-board read/write storage by multiple devices without the increased costs, complexity, and size of redundant memory chips.
		During the beginning of the 80X86 era of the early 1980s, dual-port random access memory (RAM) controller chips, such as the Intel 8207, were marketed in large quantities.
		If a request for memory is made and the RAM is already in use and is of higher priority, the new RAM request is placed in a wait state until the memory is freed.
	www.mic-d.com /gallery/chips/dualportedramcontrollerlow.html (312 words)

	The trend towards industrial PC
		This sub-PC is decoupled from the ISA bus by a dual-ported RAM.
		While the PLC is viewed as it were from the outside via the serial port, the host CPU views the PLC from the inside via the dualported RAM.
		The structure of the process image in the dual-ported RAM is independent of the field bus.
	www.trs-fieldbus.com /products/PC-PLC/PC-PLCs.htm (846 words)

	AMC VMEbus Communications Controller
		The board provides 512 KBytes of RAM, of which 256 KBytes are dual-ported to the VMEbus and the remainder is local to the on-board processor.
		The dual-ported RAM may be mapped to any 256 KByte boundary in the VMEbus A32 or A24 address spaces.
		Accesses to this RAM are arbitrated on an even-handed basis preventing either the on-board processor or the VMEbus host processor(s) from slowing the other down excessively.
	www.amcuk.com /scc-16.html (499 words)

	micronote6.txt
		C. Whenever the processor reads from the dual-ported RAM, add extra code which will simply turn off the cache prior to the read and turn the cache back on after the read is complete.
		If the amount of dual-ported RAM is large this may not be practical.
		The 11/73 reads a word from the dual-ported RAM at address A which contains the value X. The value is 'cached'.
	www.ibiblio.org /pub/academic/computer-science/history/pdp-11/hardware/micronotes/numerical/micronote6.txt (1627 words)

	EE319 Project Report
		Since generally two ported rams are bigger in area than one ported rams, the area of the design will increase.
		This design uses one RAM as described in Design 5.2 The functions used are the ones described in Design 2.1 and they are all "preserved".
		Since each RAM is 0.2 million in area, we have reduced our area by 0.2 million by using this approach.
	akebono.stanford.edu /users/lucs/courses/ee319/project/report/armita_husam.html (1821 words)

	Energy Citations Database (ECD) - Energy and Energy-Related Bibliographic Citations
		A design based on a 16-bit single-board computer as a real-time data preprocessor communication to a multiprocessor bus via dual ported RAM is reported.^It offers versatility, cost effectiveness and modularity for high-voltage power line monitoring and control applications.^3 references.
	www.osti.gov /energycitations/product.biblio.jsp?osti_id=5135176 (130 words)

	Computer Laboratory - Lab 5
		On page 6 of the MegaFunction wizard, Dual Ported RAM should be set to 32k, and mapped to 00008000.
		At the same time, the FPGA should read a 16-bit value from the dual-ported RAM and put this into a module that outputs to the display.
		In the loop, a call to UART_RXD_HEX should be made to receive a hex digit, and this should be saved to the dual-ported RAM.
	www.cl.cam.ac.uk /Teaching/2004/ECADArch/lab5.html (810 words)

	A Composite Voice Synthesizer
		The DSP controls the oscillator bank through dual-port static RAM in its data memory space.
		In addition to the processor's internal processor memory, 16384 words of random access memory (RAM) are available in its external address space.
		The synchronous serial port is part of the DSP integrated circuit and drives a nine-pin connector at the back edge of the circuit board.
	www.prairienet.org /~acarrico/projects/thesis/hardware.html (756 words)

	main.v
		It also uses the module LEDCLOCK.V to output a value from the dual-ported RAM onto the LED Clock display that should be attached to the IO board.
	www.cl.cam.ac.uk /Teaching/2004/ECADArch/lab5/main.v (46 words)

	JR3 DSP based Interface Systems
		Use of the dual ported RAM allows the host to read data from the DSP with very little overhead.
		The processed data, and various status registers are located at specific locations in the dual ported RAM.
		The boards share a common architecture, consisting of the Digital Signal Processor and a shared dual-ported address space of 16k 2 byte words to which both the host and the DSP can read and write.
	www.jr3.com /dsp.html (640 words)

	CPI Library Developer's Reference Manual (6436-16): cpi_read_dpr
		All dual-ported RAM is used for messaging and therefore should not be read directly.
		Offset into the dual-ported RAM from which data is to be read.
		Reads from the dual-ported RAM of the TX board indicated by the specified handle.
	www.nmscommunications.com /manuals/6436-16/cpireaddpr.html (84 words)

	Computer Power User Article - The Saint
		The RAM on the video chip, on the other hand, is dual-ported; it can be read by the GPU while the AGP is accessing it.
		Sending data from CPU RAM to GPU RAM is fast, but pulling data back across the AGP bus can force the GPU to stall, causing a noticeable frame rate drop.
		PC RAM on the CPU side is single-access memory; it can't be accessed in parallel like console video RAM can.
	www.computerpoweruser.com /editorial/article.asp?article=articles/archive/c0302/03c02/03c02.asp&guid=mzydj9jo (1475 words)

	Computer Laboratory - Lab 6
		For the ARM, you should write some code that looks at address 4 in the dual-ported RAM each time the new frame marker changes (every location is mapped to the nearest 32-bit location, so address 4 is the second 32-bit word).
		Read from address 0 of the dual-ported RAM into a 16-bit register that feeds the LED display module.
		Adapt the ARM code so that it outputs the current time on the serial port when the minute changes.
	www.cl.cam.ac.uk /Teaching/2004/ECADArch/lab6.html (907 words)

	Basic Version
		The Dual-Ported RAM Buffer is located inside the core and is customizable in size to accommodate for the maximum packet size.
		any received/transmitted packets have to be read from or written to a Dual-Ported RAM Buffer.
		In the Basic version the packet data flow is processor driven, i.e.
	www.dapdesign.com /index.php?id=87 (56 words)

	GPS92 Event time Stamp & Time of Day/Year Clock
		The 6BEC030 may be accessed from the CAMAC dataway via the Dual-ported RAM for configuration, scheduling etc. Among other options it is possible to request alternative Time Stamp formats, for example Astronomical Time in Modified Julian Days.
		From these pieces of information, the processor then calculates the exact event time and stores this in the Dual-ported RAM.
		The CAMAC port provides facilities for interrupt signals from and to the internal processor.
	www.hytec-electronics.co.uk /gps92.htm (694 words)

	New IOP XScale boasts RAID, dual port RAM support - RISC OS News, Software and Information
		Video memory is commonly dual ported RAM, as it enables data to be read and written effectively at the same time, and it's understood that MicroDigital are using dual ported memory in the Omega computer.
		Whilst the increased Mhz, improved bus and dual ported RAM surely could be of benefit to RISC OS systems, it sounds like RAID-6 acceleration will be of little relevance.
		The XScale IOP333 is software compatible with the 600Mhz IOP321 CPU present in Castle's current Iyonix computers, and like the IOP332, the IOP333 doesn't have the bus performance issues that the IOP321 part is believed to suffer from.
	www.drobe.co.uk /riscos/artifact1302.html (1319 words)

	Halfbakery: CPU Bus Interconnect
		That worked fine, but you couldn't afford 1Gbyte of dual or quad ported RAM (see links).
		The bottle neck are those interconnects on the printed circuit board and the pins on the RAM chip.
		Otherwise the motherboard manufacturers would not do all those patches with "Northbridge" and "Southbridge." It would just be one RAM port each for CPU, Graphics, Storage, PCI bus.
	www.halfbakery.com /lr/idea/CPU_20Bus_20Interconnect (681 words)

	PowerPoint Presentation
		•The layout of the Dual Ported RAM is determined by the uCode in the CPM
		•Second code resides in another section of flash and uses external RAM to load main application over a CPM channel
		•First code resides in flash, uses internal RAM to setup chip selects
	ece-www.colorado.edu /~siewerts/ecen/ppc860_files/slide0242.htm (88 words)

	Tools Folder - Signum Systems Corp.: USP-25 In-Circuit Emulator
		USP-25 interfaces to any PC equipped with a serial port.
		All DSP resources are displayed in windows for easy viewing and modification.
	focus.ti.com /catalog/docs/thirdpartysoftwarefolder.tsp?softwareId=1726 (228 words)

	Jihad Boura, Ph
		Use of DLLS, built in dual ported RAM as well as different IO standards was used in the FPGA device
		Technology was implemented using LSI10K family using its PLL technology, multiple clock trees, and dual ported RAM.
		The chip was the first of its kind in the industry.
	webpages.charter.net /jboura/resume.html (1974 words)

	Macrolink VME MVC 16-Line Asynchronous Communications Multiplexer
		All the MVC's VMEbus and port parameters are soft-configured and can be defined on a line-by line basis.
		The MVC is ideal for applications with large amounts of high-speed data traffic including graphics, supervisory/robotics and PC-to-host file transfers as well as interactive terminal communications.
		Our design allows all 16 ports to operate at 38.4 KBaud, an overall throughput well in excess of 61,000 characters per second.
	www.macrolink.com /vmebus/vme_mvc.htm (810 words)

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