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	Fused multiply-add - Wikipedia, the free encyclopedia
		When implemented in a microprocessor this is typically faster than a multiply operation followed by an add.
		Because of this instruction there is no need for a hardware divide or square root unit since they can both be implemented using the FMA in software.
		The FMA operation will likely be added to IEEE 754 in IEEE 754r.
	en.wikipedia.org /wiki/Fused_multiply-add (145 words)

	Re: Another approach to fused multiply add...
		No I am referring to expanding upon the operation list of add, sub, mul, div, - and I was doing this in context of the FMA discussion which I tied to the multiprecision feature discussion.
		What if a vendor decides to add a 48 bit significand type to his hardware, and then an application that uses it becomes popular.
		I don't really get the implied point of contradiction, surely you don't mean to say that because bugs exist in the world that there is no benefit to standardizing arithmetic or in simplifying the programming task.
	grouper.ieee.org /groups/754/email/msg00037.html (762 words)

	Multiply-accumulate - Wikipedia, the free encyclopedia
		The multiply-accumulate operation computes a product and adds it to an accumulator.
		When done with integers this operation is typically exact (computed modulo some power of 2).
		When done with floating point numbers it might be performed with two roundings (typical in many DSPs) or with a single rounding, called a fused multiply-add (FMA).
	en.wikipedia.org /wiki/Multiply-accumulate (80 words)

	Eric Fleegal's WebLog : Fused Multiply Add Question (Site not responding. Last check: 2007-10-19)
		To my knowledge FMAs won't be supported on all platforms since not all platforms have FMA instructions (some platforms don't even have floating point units!).
		Simple addition is accomplished by using the 1 valued register as one of the multiply arguments; similarly simple multiplication is accomplished by using the 0 valued register as the addition argument.
		If the fma function was available even on the platforms without hardware (x86), it would simplify implementation of a number of interesting algorithms.
	blogs.msdn.com /ericflee/archive/2004/12/17/323880.aspx (366 words)

	Fused multiply-add -- Facts, Info, and Encyclopedia article (Site not responding. Last check: 2007-10-19)
		In (The branch of engineering science that studies (with the aid of computers) computable processes and structures) computing, a fused multiply-add computes a (additional info and facts about multiply-accumulate) multiply-accumulate
		Because of this instruction there is no need for a hardware (A serious disagreement between two groups of people (typically producing tension or hostility)) divide or (A number that when multiplied by itself equals a given number) square root unit since they can both be implemented using the FMA in software.
		The FMA operation will likely be added to (additional info and facts about IEEE 754) IEEE 754 in (additional info and facts about IEEE 754r) IEEE 754r.
	www.absoluteastronomy.com /encyclopedia/f/fu/fused_multiply-add.htm (267 words)

	[No title]
		Disabling fused multiply/add and multiply/subtract instructions forces the compiler to use separate instructions for the multiply and add/subtract operations.
		This may be desirable in some cases where strict IEEE 754-compliant results are required: the fused multiply add/subtract instructions do not round the intermediate result, thereby producing results with _more_ bits of precision than specified by the IEEE standard.
		Disabling fused multiply add/subtract instructions also ensures that the program output is not sensitive to the compiler's ability to combine multiply and add/subtract operations.
	www.cse.ohio-state.edu /~weide/rsrg/sce/gcc-3.2.3/install/info/gcc.info-9 (4651 words)

	IA-64 Floating-Point Operations and the IEEE Standard for Binary Floating-Point Arithmetic
		The benefit that arises from this property is that it enables the implementation of a whole new category of numerical algorithms, relying on the possibility of performing this combined operation with only one rounding error (see the subsections on divide and square root below).
		In addition to fma and fms, a similar operation is available for the floating-point negative multiply-add operation, fnma.
		These can happen on the fma instruction, but the conversion will be correct numerically even without this instruction, as all the single precision values can be represented in the double precision format.
	www.intel.com /technology/itj/q41999/articles/art_6d.htm (1469 words)

	Re: Another approach to fused multiply add...
		This interpretation >> matches what the proposed changes would specify except for one thing: >> >> > > 0"inf" as part of any ternary fused* multiply add operation also raises the >> > > invalid exception unless the addend is a Quiet NaN.
		Prev by Date: Another approach to fused multiply add...
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	grouper.ieee.org /groups/754/email/msg00035.html (1142 words)

	Project-Team-Arénaire
		It means that we can now formally prove hardware-level algorithms [62] with the proof assistant and that hardware-level operations can interact with high-level properties.
		It also adds trust in our initial formalization as the translation from it to vector of bits is now possible [30].
		Using the properties of the IEEE-754 floating-point arithmetic, proofs that the algorithms implemented in Cosy do indeed determine an enclosure of roundoff errors have been built and completed [24], the latter algorithms have been improved [57].
	www.inria.fr /rapportsactivite/RA2004/arenaire/uid55.html (403 words)

	Holistic Health Encyclopedia - E
		Substances in the body such as sodium, potassium and cholride that are essential to maintain the electrochemical gradients necessary for cellular function.
		A substance that separates into ions when fused or in solution, and thus becomes capable of conducting electricity; an ionic solute.
		Add an equal amount of water and some ice and drink slowly.
	www.findhealer.com /glossary/E.php3 (7235 words)

	Improving Java for Numerical Computation
		Therefore, to add operator overloading to Java, some technique must be used to allow operator methods to be declared.
		Mandating a fused mac is necessary to simulate a fused mac capable machine on one that isn't.
		On machines with fused mac instructions, chained multiply and add/subtract operations in the source code can be fused at runtime in default mode.
	math.nist.gov /javanumerics/reports/jgfnwg-01.html (8833 words)

	National Partnership for Advanced Computational Infrastructure: Archives
		Default behavior is to allow fused multiply adds to be performed only when float optimization is turned on.
		When this option is turned on, the compiler is allowed to, but not required to, fuse multiply-add operations into one instruction.
		This directive specifies that the compiler generate a fused multiply-add instruction for every expression (or subexpression) of the form X + YZ, X - YZ, or Y*Z - X. Note that this selection can be ambiguous.
	www.npaci.edu /MTA/tera-doc/pg/html/Compilation_directives.html (2396 words)

	[No title]
		The extra-accuracy fused multiply-add instruction of RS/6000 machines combined with a few algorithmic innovations gives rise to the 50-fold increase.
		Introduction The extra-accurate fused multiply-add (FMA) operation of the RS/6000* and PowerPC* family of RISC microprocessors offers many opportunities to use mathematical innovation to produce fast algorithms for numerically intensive computation (NIC).
		The fused multiply-add operation on RS/6000 and PowerPC computes the correctly rounded d = fl(ab + c) for any of the four IEEE rounding modes.
	www.research.ibm.com /journal/rd/461/agarwal.txt (3623 words)

	Apple - Science - Virginia Tech
		Thus, unlike the Opteron, it can perform fused multiply-adds, giving four operations per clock cycle and achieving a theoretical limit of 8 gigaflops from a 2 GHz processor.
		Adds Varadarajan, “When we were evaluating machines and platforms, I realized that the PowerPC 970 processor would be ideal for us.
		Its fused multiply-add operation gives it a floating-point performance equal to — if not better than — Intel’s Itanium2 solution.
	www.apple.com /science/profiles/vatech/architecture.html (491 words)

	Automatic Generation Of Implementations For Dsp Transforms On (ResearchIndex) (Site not responding. Last check: 2007-10-19)
		Fused Multiply-Add Architectures Yevgen Voronenko and Markus P uschel...
		For DSP transforms, compilers can only generate FMA code to a very limited extent because optimal use of FMAs requires modifying the chosen algorithm.
		In this paper we present a framework for automatically generating FMA code for every linear DSP transform, which we implemented as an extension to the SPIRAL code generation system.
	citeseer.ist.psu.edu /697520.html (271 words)

	PowerPC Compiler Writer's Guide - Code Selection
		In these implementations, the multiply-add operations are faster than separate multiply and add steps.
		Operations—Add, subtract, multiply, divide, square root (optionally supported by PowerPC architecture), round to single-precision, convert floating-point value to integer word or doubleword, convert integer doubleword to floating-point value, and compare (result is delivered as a condition code).
		If the divisor is a denormal, multiplying by the reciprocal may give a different result than division (the reciprocal of a denormalized number may be infinite).
	the.wall.riscom.net /books/proc/ppc/cwg/code3.html (4673 words)

	Microparallelism and High-Performance Protein Matching
		Section 4 presents another technique based on interpreting ADD and MIN operations as floating-point multiply and add instructions.
		However, microparallelism can also be used with data that are more than one bit wide, for instance to add two pairs of short integers (or 4 byte-long integers) in a single instruction, or for tristate logic VLSI simulation using carefully chosen 2-bit encodings [BCRR87].
		This is the incentive behind reformulating ADD and MAX operations as floating-point multiply and add instructions.
	www-cse.ucsd.edu /users/carter/Micro/sc95.html (4057 words)

	Another approach to fused multiply add... (Site not responding. Last check: 2007-10-19)
		> > FYI, > > > I have the changes needed to add fused multiply add to the > > standard.
		A fused multiply-add can be con- > sidered to be a multiply that delivers its result to a destination > whose format is wide enough to hold all intermediate results exactly > followed by an add that delivers a result to the same format followed > by a conversion back to the operands' format.
		> > When fused multiply-add is regarded as an exact multiply followed by > an exact add followed by a conversion, the multiplication 0*inf would > raise the invalid operation exception regardless of the addend.
	www.cs.berkeley.edu /~ejr/projects/754/email/msg00034.html (415 words)

	Optimization Parameters
		This optimization is enabled by default at optimization level 2 or higher.
		At optimization level 2 or higher, the optimizer fuses adjacent multiply and add operations.
		FMA instructions are only available on PA-RISC 2.0 systems.
	docs.hp.com /en/5965-0719/ch01s03.html (1125 words)

	Using the GNU Compiler Collection (GCC): Xtensa Options (Site not responding. Last check: 2007-10-19)
		Enable or disable use of the 16-bit integer multiplier option.
		Enable or disable use of fused multiply/add and multiply/subtract instructions in the floating-point option.
		This may be desirable in some cases where strict IEEE 754-compliant results are required: the fused multiply add/subtract instructions do not round the intermediate result, thereby producing results with more bits of precision than specified by the IEEE standard.
	www.ifh.ee.ethz.ch /sepp/gcc-3.2.2-to/gcc_57.html (785 words)

	Trinary Operations (Site not responding. Last check: 2007-10-19)
		For floating point operands “a+bc” and “bc+a” should specify the fused multiply add that is available on many machines.
		I illustrate with the proposal for the fused operation.
		Where precedence terminology is used to define expression semantics, one can simply say that whenever multiplication operators take precedence over addition operators, the fused multiply add is to be used.
	www.cap-lore.com /Languages/trinary.html (127 words)

	Fast pseudorandom-number generators with modulus 2k or (2k)-1 using fused multiply-add
		However, the last FMA of the loop is followed by the first FMA of the loop with i replaced by i + 4; thus, there is no separation between the target x(i + 4) and the target u.
		A means for efficiently computing the modulus operation in (66) using IEEE double-precision arithmetic and the RS/6000 FMA instruction is a main contribution of this section, and is derived next.
		We have used algorithmic innovation and the FMA instruction in the design of several uniformly distributed pseudorandom-number generators for the intervals (0, 1) and (–1, 1).
	www.research.ibm.com /journal/rd/461/agarwal.html (7296 words)

	[No title]
		Unix or VMS users, use "unzip -a ddjcompr" to get correct end-of-lines (add -d to recreate the directory structure if you are using an obsolete version of unzip such as 4.1).
		Human assistance to the compression is no longer needed and the compression time is reasonable, although the more time and compute power you throw at the compression, the smaller the resulting file for the same level of quality.
		adds: Iterated systems are shipping a general purpose compressor at about 300 Pounds in the UK that claims "640x480 24 bit colour compression of about 1 min at 922k -> 10k on a 486/50 software only, decomp.
	www.cv.nrao.edu /fits/traffic/compcompression/faq_1.news (11790 words)

	[No title]
		The Power architecture was one of the first to include a fused multiply-add instruction, giving a two-fold speedup in many floating-point intensive programs.
		Another interesting and important feature of the Power architecture is its incrementing loads and stores, which significantly reduce instruction overhead in loops involving array operations.
		For example, the inner loop of a simple matrix multiply, SUM += B(I,K)*C(K,J), requires two incrementing loads, one multiply-add, and a branch, for a tight 4-instruction loop that is minimally compact, and readily generated by IBM compilers.
	www.math.utah.edu /pub/tex/errata/computer-architecture.errata (1738 words)

	Accelerating FFTW by Multiply-Add Optimization (ResearchIndex) (Site not responding. Last check: 2007-10-19)
		Abstract: Modern computer architecture provides a special instructionthe fused multiply-add (FMA) instructionto perform both a multiplication and an addition operation at the same time.
		This report demonstrates the promising oating-point performance of newly developed FMA optimized radix-2, radix-4, and radix-8 FFT kernels.
		2 Modied FFTs for Fused Multiply-Add Architectures (context) - Linzer, Feig - 1993
	citeseer.ist.psu.edu /273715.html (350 words)

	IBM Journal of Research and Development: IBM eServer z990 floating-point unit, The
		The floating-point unit (FPU) of the IBM z990 eServer(TM) is the first one in an IBM mainframe with a fused multiply-add dataflow.
		The HFP instructions are capable of performing one add or one multiply per cycle with a latency of about three cycles.
		Therefore, the detection of denormalized numbers must be integrated in the first execution cycle, which requires some additional effort in the multiplier and the aligner logic.
	www.findarticles.com /p/articles/mi_qa3751/is_200405/ai_n9388219 (1478 words)

	CS594: Notes for Lecture 5, Feb 11, 1998
		The top curve is for matrix-matrix multiply (BLAS3), the second highest curve (for large dimension) is matrix-vector multiply (BLAS2), and the lowest curve is for saxpy (BLAS1) on the RS6000.
		On the RS6000/590, a single floating point instruction can do a multiply and an add in a pipeline of length 2, yielding a factor 2 in speed up if a long sequence of such operations is available.
		The fused multiply-add may be used to simulate higher precision cheaply.
	www.cs.utk.edu /~dongarra/WEB-PAGES/lect05.html (5624 words)

	IBM Systems Journal: High-performance parallel implementations of the NAS kernel benchmarks on the IBM SP2 - Numerical ...
		The only communication in this problem is to add the 10 sums from various processors at the end, which is insignificant.
		Thus, the only optimization we did was to improve the performance of the single node.
		We used an improved random number generator that utilizes the fused multiply-add unit of the RS/6000.
	www.findarticles.com /p/articles/mi_m0ISJ/is_n2_v34/ai_17285764 (1437 words)

	[No title] (Site not responding. Last check: 2007-10-19)
		Including contractions, such as fused multiply-add (FMA), also allows floating point optimizations which may affect the generation and propagation of infinities, NaNs, and the sign of zero.
		Permits optimizations, such as reordering of expressions, even if parenthesized, that may affect a rounding error.
		FMA instructions can improve performance of floating-point applications and are available only on PA-RISC 2.0 systems or later.
	www.spec.org /omp/results/flags/HP-20020321.txt (1721 words)

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