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Topic: Global descriptor table

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	[No title]
		It is these descriptors that identify the characteristics of the segments of global memory.
		This private table is called the local descriptor table (LDT) and defines a local memory address space for use by the task.
		The LDT holds segment descriptors that provide access to code and data in segments of memory that are reserved for the current task.
	home.swipnet.se /smaffy/asm/info/PMODEDetailedApproach.txt (2128 words)

	A CRASH COURSE IN PROTECTED MODE
		The address of this table is given in a special register of the CPU and is called the global descriptor table register.
		There always must be a GDT when in protected mode because it is in this table where all of the segments are defined.
		Example code: Suppose you what to access location 012345h in your data segment and you were told that the descriptor for your data segment is descriptor number 6 in the Global Descriptor Table.
	www.geocities.com /SiliconValley/2151/pmode.html (908 words)

	Global Descriptor Table - Wikipedia, the free encyclopedia
		Every 8-byte entry in the GDT is a descriptor, but these can be Task State Segment (or TSS) descriptors, LDT descriptors, or Call Gate descriptors.
		The LDT is supposed to contain memory segments which are private to a specific program, while the GDT is supposed to contain global segments.
		Apart from the machine instructions which allow one to set/get the position of the GDT (and of the Interrupt Descriptor Table) in memory, every machine instruction referencing memory has an implicit Segment Register, occasionally two.
	en.wikipedia.org /wiki/Global_Descriptor_Table (417 words)

	Global Descriptor Table
		The GDT contains the descriptors that are shared among all the tasks in the system.
		Some descriptors, in particular the LDT descriptors used for tasking and the TSS descriptors used for threading, must reside in the GDT.
		The second descriptor is the kernel code descriptor, which defines a 32 bits execute-read segment with base zero and limit set to 16 megabytes (this is all the maximum amount of memory currently supported), and Descriptor Privlege Level set to zero (most privileged).
	sartoris.sourceforge.net /isma-0.5.3/sartoris-node14.html (315 words)

	[No title] (Site not responding. Last check: 2007-10-08)
		The table indicator select a table between the GDT (global descriptor table) and the LDT (local descriptor table).
		Since each entry in the global descriptor table is of length 8 bytes, there can be maximun of 8K entries in the global descriptor table.
		This descriptor is used to point to a LDTR cache which defines the base of the LDT and the limit of LDT.
	web.engr.oregonstate.edu /~sllu/471/x86.html (3122 words)

	Summit Soft Consulting - Articles
		A segment descriptor contains (among other information) the start address of the code segment that is described by the descriptor, the length of the code segment and the privilege level that the code in the code segment will execute at.
		Since there are two segment descriptor tables it is not enough to use an index to uniquely select a segment descriptor.
		The syntax for displaying the IDT descriptor for 'int 2e' is "!descriptor IDT 2e".
	www.summitsoftconsulting.com /NtSystemCalls.htm (2565 words)

	[No title]
		The global descriptor table MUST be used; the local descriptor table is optional.
		The appropriate segment descriptors are always copied into one of 6 dedicated register areas whenever any of the 6 segment registers are modified; thus, the descriptor tables are normally accessed infrequently.
		The page table entry specifies a physical page, and the bottom 12 bits (bits 11 through 0) of the linear address are used as the offset within the page.
	www.eecs.umich.edu /~farnam/482/Winter99/INTEL-MMU.txt (681 words)

	[No title]
		The GLOBAL DESCRIPTOR TABLE (GDT) The Global Descriptor Table (GDT) is a table of DESCRIPTORS and it is stored in memory.
		The address of this table is given in a special 386 register called the global descriptor table register.
		Example: Suppose you what to access location 012345h in your data segment and you were told that the descriptor for your data segment is descriptor number 6 in the Global Descriptor Table.
	home.swipnet.se /smaffy/asm/info/PMODECrashCourse.txt (1446 words)

	Taming the x86 beast (Site not responding. Last check: 2007-10-08)
		The GDT can be located anywhere in memory (we'll return to this paradox in a moment) and its base address is defined by a new x86 register, the GDTR.
		A segment descriptor tells the world (and the processor itself) everything it needs to know about one segment of memory: where it starts; how long it is; whether it holds code, data, or stack; and various other obscure details.
		Typically, segment descriptors are all created at system-initialization time to define all areas of memory you expect to use and their expected uses (code, data, stack).
	www.embedded.com /shared/printableArticle.jhtml?articleID=18400795 (2758 words)

	Dr. Dobb's \| Protected-Mode Debugging Using In-Circuit Emulators \| July 22, 2001 (Site not responding. Last check: 2007-10-08)
		Once the Global Descriptor Table (GDT) register has been loaded to point to the area of memory where the GDT will reside, and the Protection Enabled (PE) bit in the CRO register has been set, the CPU is in protected mode.
		If the values in the GDT register don't make sense, it may be that the program is loading them from the wrong memory location, or that the correct location is being accessed but the values at the location are incorrect.
		Example 8: (a) Displaying the current local descriptor table using the LDT command; (b) writing the limit field of the descriptor in slot #3 of the LDT, whose descriptor is in slot #7 of the GDT.
	www.ddj.com /article/printableArticle.jhtml?articleID=184408712&dept_url= (3761 words)

	LGDT - Load Global Descriptor Table Register
		Loads the values in the source operand into the global descriptor table register (GDTR) or the interrupt descriptor table register (IDTR).
		The source operand specifies a 6-byte memory location that contains the base address (a linear address) and the limit (size of table in bytes) of the global descriptor table (GDT) or the interrupt descriptor table (IDT).
		If operand-size attribute is 32 bits, a 16-bit limit (lower 2 bytes of the 6-byte data operand) and a 32-bit base address (upper 4 bytes of the data operand) are loaded into the register.
	faydoc.tripod.com /cpu/lgdt.htm (201 words)

	[No title]
		Descriptor Cache Formats Intel's position is that this instruction is not useful to most users, and can easily lead to machine crashes if not used properly.
		These are hidden registers that cannot otherwise be modified by the programmer; they are set automatically when a descriptor is read from the descriptor table.
		By setting the privilege level of all local and global descriptor table entries lower than that of the current program, a protection violation occurs whenever the program attempts to load a segment register.
	artofhacking.com /IET/PRGM/LOADALL.TXT (1319 words)

	GDT - Biocrawler (Site not responding. Last check: 2007-10-08)
		The GDT or Global Descriptor Table is a data structure used by Intel x86-family processors starting with the 80286 in order to define the characteristics of the various memory areas used during program execution, for example the base address, the size and access privileges like executability and writability.
		The GDT could as well be called a global segment descriptor table.
		Apart from the machine instructions which allow one to set/get the position of the GDT (and of the LDT) in memory, every machine instruction referencing memory has an implicit Segment Register, occasionally two.
	www.biocrawler.com /encyclopedia/GDT (400 words)

	DOCERR: Segment and Handle Limits and Protected Mode Windows
		Because each descriptor is 8 bytes long, each descriptor table can hold a maximum of 8192 descriptors (64K divided by 8 bytes equals 8K).
		Because descriptors are used for code, data, and resource segments, the maximum number of descriptors available for applications to use for global memory blocks is considerably less than 8192 and 4096.
		Instead of allocating many small blocks from the global heap, an application should allocate fewer blocks that are larger in size.
	support.microsoft.com /kb/68644 (802 words)

	Null Descriptor (Site not responding. Last check: 2007-10-08)
		The first entry in the Global Descriptor Table (GDT) is called the null descriptor.
		Intel does state that the 0'th descriptor table entry is never referenced by the processor.
		Using the NULL descriptor as a pointer to the GDT, simplifies the data segment, and conceptualization of the GDT as follows:
	www.x86.org /productivity/nulldescriptor.htm (246 words)

	x86 Segmentation for the 15-410 Student
		The segment number indexes a segment descriptor table which is much like the interrupt descriptor table.
		There are two tables of segment descriptors, the global descriptor table and the local descriptor table.
		The table indexed by the segment number depends on the table selector flag.
	www.cs.cmu.edu /~410/doc/segments/segments.html (1576 words)

	386 Protected Mode
		A load from location DS:1000 makes the processor read a descriptor by shifting DS left 3 bits (i.e., times 8), adding the table's base address (stored in the 386's on-board descriptor table register), and reading the 8 byte descriptor at this address.
		The descriptor contains the segment's start address, which is added to the offset in the instruction (in this case 1000).
		GDT entries 1 to 8 are reserved in this case, but 9 corresponds to dgroup, 10 to cgroup, etc. The linker will build GDT and insert it into the program.
	www.avocetsystems.com /company/articles/magazine/aprot1.htm (2138 words)

	Managing Tasks on x86 Processors (Site not responding. Last check: 2007-10-08)
		Toward the top end of the table is a selector to an LDT—a local descriptor table that allows each task to have its own private table of memory descriptors along with the GDT.
		As the name suggests, a local descriptor table is local; it's private to one task, rather than globally shared among all tasks.
		So there are really two sets of descriptor tables active at any one time, and it doesn't really matter which of the two tables holds a particular descriptor.
	www.embedded.com /shared/printableArticle.jhtml?articleID=55301875 (3664 words)

	Translating virtual addresses to physical addresses (Site not responding. Last check: 2007-10-08)
		The lower three bits indicate whether the descriptor table belongs to the kernel or a user process and its privilege level.
		A segment's descriptor table entry stores (among other things) its base linear address; this is added to the offset to produce a linear address.
		The entry in the page table points to the base address of physical page in memory; the lowest 12 bits of a linear address act as an offset to the location of the physical address within the page.
	osr600doc.sco.com /en/SM_trouble/addr_trans.html (353 words)

	Microtopia - Canadian Patent prosecution
		This resolving which occurs during the execution of a program includes assigning the segment a selector and storing the actual segment in the global descrip-tor table and local descriptor table and resolves the address of the function to its selector and offset.
		Each application has its own descriptor table, called a local descriptor table containing segments private to the application, as well as a replica of the global descriptor table, containing the applica-tion access to system segments.
		This method of using a dynamic link library, selectors, and descriptor tables, all occurs during the execution of a program to result in the benefit of requiring only one copy of the API code for the entire application program.
	www.microtopia.net /canadianpatent.html (1221 words)

	ARCHIVES (Site not responding. Last check: 2007-10-08)
		Each entry in the table contains a 32bit offset relative to the start of the executable image of a 16bit WORD that must be set to the programs data selector at load time.
		The Global Descriptor Table (GDT) is a table of DESCRIPTORS and it is stored in memory.
		TI bit select the table to be used when accessing a segment descriptor, because two tables are active at the same time GDT and LDT.
	www.mega-tokyo.com /blog/archives.php?id=A1995111 (4979 words)

	SGDT - Store Global Descriptor Table Register
		Stores the contents of the global descriptor table register (GDTR) or the interrupt descriptor table register (IDTR) in the destination operand.
		The SGDT and SIDT instructions are only useful in operating-system software; however, they can be used in application programs without causing an exception to be generated.
		See "LGDT/LIDT - Load Global/Interrupt Descriptor Table Register" in this chapter for information on loading the GDTR and IDTR.
	faydoc.tripod.com /cpu/sgdt.htm (148 words)

	Interrupt descriptor table - Wikipedia, the free encyclopedia
		The Interrupt Descriptor Table (IDT) is a data structure used by the x86 architecture to implement an interrupt vector table.
		The IDT is used by the processor to determine the correct response to interrupts and exceptions.
		In Protected Mode, the IDT is an array of 8-byte descriptors stored consecutively in memory and indexed by an interrupt vector.
	en.wikipedia.org /wiki/Interrupt_descriptor_table (704 words)

	Booting
		Segment Descriptors are held in one of two tables, either the GDT (defined once off) or a Local Descriptor Table (could be defined per process).
		Page tables are stored in memory and are there to match or to map the linear addresses to physical addresses.
		Used when process calls long file, when lots of page descriptors are loaded into memory hard to find a specific set of data, therefore a page hash table acts as a preliminary index so that only relevant pages of the file are loaded into memory and memory not swamped with irrelevant detail.
	learnlinux.tsf.org.za /courses/build/internals/ch02s02.html (1418 words)

	Bran's Kernel Development Tutorial: Global Descriptor Table
		We can use an entry in the GDT to generate segment violation exceptions that give the kernel an opportunity to end a process that is doing something it shouldn't.
		Each GDT entry also defines whether or not the current segment that the processor is running in is for System use (Ring 0) or for Application use (Ring 3).
		The GDT needs to be one of the very first things that you initialize because as you learned from this section of the tutorial, it's very important.
	www.osdever.net /bkerndev/Docs/gdt.htm (1345 words)

	15. Accessing 4 Gigs of Memory in Real Mode
		In protected mode, the value in the segment register is used as an index into a descriptor table located in memory, and the base address and size (which may be as small as 4 KB, or as large as 4 GB) from the descriptor table are loaded into the descriptor cache.
		Even if this were a valid descriptor (unlikely), it would have to have a base address identical to real mode segment 1000h (i.e., 10000h), and a size limit of 64 KB to prevent a probable crash.
		After all, as soon as you reload new values into the segment register, the descriptor cache entry for that segment will be reset according to the rules of the current mode.
	www.faqs.org /faqs/assembly-language/x86/general/part2/section-1.html (1119 words)

	Assembly Language programming (Site not responding. Last check: 2007-10-08)
		Extra protection is provided by use of descriptor tables on a task by task basis, which describe their priviledge level, and access rights (execute, read only, read write).
		The table entry value is then combined with the rest of the address bus and presented to physical memory.
		These descriptors are NOT programmer visible, but their contents are automatically loaded by the processor from contents of the segment registers and the descriptor tables pointed to by GDTR and LDTR.
	goforit.unk.edu /asm/p386_2.htm (2549 words)

	Bluejay Operating System
		Enters the new Local Descriptor Table into the Global Descriptor Table, then loads the start thread which continues the initialization from within the new process' own address space.
		User bitmaps are user-writeable and reside in the Local Descriptor Table.
		Display window bitmaps are not user-accessible and reside in the Global Descriptor Table.
	members.cruzio.com /~bluejay/syscalls.html (832 words)

	Protected Mode Memory Addressing
		Although the AR must always be valid, when P=0, the rest of the descriptor can be used in any way the OS likes.
		The 13 bit descriptor index selects one of up to 8K descriptors in either the GDT and LDT, as specified by the TI bit.
		There is one cache register for each of the 6 segment registers, CS, DS, etc. and the LDTR (Local Descriptor Table Register) and TR (Task Register) selectors.
	www.cs.umbc.edu /~plusquel/310/slides/micro_arch2.html (675 words)

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