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	New standard to speed chip connections \| CNET News.com
		The HyperTransport Consortium, which controls the specifications for the chip-to-chip connection technology behind Advanced Micro Devices' upcoming Opteron processor, expects to release the new specification, HyperTransport 2.0, a year from now.
		HyperTransport is an effort initiated by AMD to define a new high-speed technology for connecting PC components.
		HyperTransport, an idea that partly originated out of technology from defunct computing giant Digital Equipment, is one of the primary features of AMD's upcoming Opteron and Athlon 64 chips, which are expected to help AMD move from the fringes of the corporate market toward the mainstream.
	news.com.com /2100-1001-982484.html (757 words)

	VHJ: What is Hypertransport?
		Hypertransport is defined as a pair of unidirectional paths, each starting with a sending port and ending with a receiving port.
		Thus Hypertransport is invisible to the code executing in the processor and to active logic destination ports that return data or commands/interrupts - subsystems such as udma controllers in IDE and SCSI hard drive controllers, for example.
		Hypertransport is the future, IF and only if all of you abandon the safe harbors of Intel concepts and venture into new realms of design.
	www.vanshardware.com /news/2002/07/020722_Nils_What_Is_Hypertransport/020722_Nils_What_Is_Hypertransport.htm (1401 words)

	HyperTransport™ Consortium - Technology
		HyperTransport interconnect technology is a high-performance, high-speed, high-bandwidth, point-to-point link that provides the lowest possible latency for chip-to-chip and board-to-board links.
		HyperTransport technology provides a flexible, scalable interconnect architecture designed to reduce the number of buses within the system, provides a high-performance link for applications ranging from embedded systems, to personal computers and servers, to network equipment and supercomputers.
		HyperTransport 3.0 extends HyperTransport 2.0’s 1.4 GHz dual data rate (DDR) maximum clock to 1.8 GHz, 2.0 GHz, 2.4 GHz and 2.6 GHz, and delivers a maximum aggregate bandwidth of 41.6 gigabytes per second (GB/s) - a bandwidth increase of 86 percent over HyperTransport 2.0.
	www.hypertransport.org /tech/index.cfm (238 words)

	The Ultimate HyperTransport Dog Breeds Information Guide and Reference
		HyperTransport supports an auto-negotiated bus widths, from 2 (bidirectional serial, 1 bit each way) to 32-bit (16 each way) busses are allowed.
		HyperTransport is packet-based, with each packet always consisting of a set of 32-bit words, regardless of the physical width of the bus interconnect.
		This is to allow hypertransport controllers to disconnect end devices on the hypertransport chain when a processor is entering a C3/C4 sleep state or other state that requires a bus disconnect.
	www.dogluvers.com /dog_breeds/LDT (949 words)

	HyperTransport Stays Ahead of the Curve
		The HyperTransport technology was introduced in 2001 to provide a general purpose, low-latency, high bandwidth system interconnect that was designed to overcome some of the shortcomings of shared bus technologies and proprietary interconnects.
		According to Mario Cavalli, general manager for the HyperTransport Consortium, one of the unique strengths of HyperTransport is its processor native interface.
		HyperTransport designers decided to add this feature as they saw the increased need for off-board connectivity in larger more complex systems, where memory and processors often scale beyond the board.
	www.hpcwire.com /hpc/646006.html (1131 words)

	HyperTransport 2.0 Performance
		HyperTransport is the fastest chip-to-chip interconnect available for today's high-performance computers—and it comes as part of every AMD Opteron-based system.
		HyperTransport is primarily a chip-to-chip interconnect, so an important element of its design is its bridge capabilities to board-level bus systems, such as AGP, PCI, PCI-X and PCI Express.
		HyperTransport 1.05 created a bridge to PCI-X; HyperTransport 2.0, which appeared in 2004, added in the PCI Express mappings and appropriate bridge technology.
	www.devx.com /amd/Article/27012 (1029 words)

	LinuxElectrons - HyperTransport Consortium Releases Details of New 3.0 Specification
		HyperTransport 3.0 builds on the existing HyperTransport 1.0 and 2.0 standards which continue to be designed into end systems at an accelerating rate, and have helped HyperTransport reach considerable market presence and success.
		HyperTransport is the industry's lowest latency, highest-performance, fully scalable, packetbased interconnect technology serving a wide range of industry segments.
		HyperTransport technology is natively embedded in multiple CPU families from AMD, Broadcom, IBM, NetLogic Microsystems, PMC-Sierra, Raza Microelectronics and Transmeta and in a variety of semiconductors and IP cores.
	www.linuxelectrons.com /article.php/20060424181326377 (991 words)

	CommsDesign - Challenges in HyperTransport Verification
		If the HyperTransport host bridge is not functioning properly, it may cause data overflow in downstream buffers, or if a downstream device is malfunctioning, deadlock conditions may occur.
		HyperTransport allows for a significant amount of clock skew between clock and data and between adjacent byte lanes, as well as between clock and control signals.
		And considering the challenges particular to HyperTransport, purchasing the verification IP that has been tested and proven is probably the wisest decision.
	www.commsdesign.com /design_corner/OEG20021022S0001 (1748 words)

	HyperTransport ™ Technology (Site not responding. Last check: 2007-11-06)
		HyperTransport technology is a high-speed, low latency, point-to-point link designed to increase the communication speed between integrated circuits in computers, servers, embedded systems, and networking and telecommunications equipment up to 48 times faster than some existing technologies.
		HyperTransport technology helps reduce the number of buses in a system, which can reduce system bottlenecks and enable today's faster microprocessors to use system memory more efficiently in high-end multiprocessor systems.
		HyperTransport technology was invented at AMD with contributions from industry partners and is managed and licensed by the HyperTransport Technology Consortium, a Texas non-profit corporation.
	amd.com /us-en/Processors/DevelopWithAMD/0,,30_2252_869_2353,00.html (172 words)

	TechOnline \| Connectorless Probing Enables HyperTransport Debug at 2.4Gb/s
		HyperTransport is becoming one of the most popular links for chip-to-chip communication.
		One of the biggest challenges facing engineers as they try to debug HyperTransport links is making the physical connection between their logic analyzer and the target system.
		Since HyperTransport is specifically designed for computing systems, the analysis probe must be able to work in non-planar environments without special consideration.
	www.crn.com /sections/BreakingNews/dailyarchives.asp?ArticleID=38848 (1604 words)

	HyperTransport - a Whatis.com definition
		HyperTransport is a high-speed, point-to-point, 32-bit technology for data transfer within the integrated circuits (ICs) in computers and other devices.
		HyperTransport was developed by AMD in cooperation with several other companies, and is a trademark of the HyperTransport Consortium.
		HyperTransport is aimed at applications that require greater bandwidth than other current technologies allow.
	whatis.techtarget.com /gDefinition/0,294236,sid8_gci858113,00.html (209 words)

	Ars Technica: API Networks Launches Switch; HyperTransport Moves Closer - Page 1 - (11/2001) (Site not responding. Last check: 2007-11-06)
		In this brief article, I want to take a look at HyperTransport in general and this switch in specific, with an eye to what it shows us about the kinds of technologies that will drive increases in computing performance over the next few years.
		One of the themes of this year's Microprocessor Forum was that processor speeds have outstripped bus speeds to the point where system performance bottlenecks are located not in the CPU but in the connections between the CPU and the rest of the system.
		HyperTransport, co-developed by AMD and API Networks, is intended to meet this chip-to-chip bandwidth need using a point-to-point, packet-switched solution.
	arstechnica.com /wankerdesk/01q4/hypertransport/hypertransport-1.html (589 words)

	HyperTransport - Wikipedia, the free encyclopedia
		HyperTransport comes in three versions — 1.0, 2.0, and 3.0 — which run from 200MHz to 2.6GHz (compared to PCI at either 33 or 66 MHz).
		HyperTransport can be used for generating system management messages, signaling interrupts, issuing probes to adjacent devices or processors, and general I/O and data transactions.
		AMD uses HyperTransport with a proprietary cache coherency extension as part of their Direct Connect Architecture in their Opteron and Athlon64 line of processors.
	en.wikipedia.org /wiki/HyperTransport (1053 words)

	[H] Enthusiast - HyperTransport
		HyperTransport provides an aggregate throughput of 12.8 Gigabytes per second and is optimized for next-generation chip-to-chip control plane, data plane and look aside applications.
		HyperTransport is designed to address the requirements of the networking and communications industry, while preserving the current and future software investment that already exists with the Peripheral Component Interconnect (PCI) today.
		HyperTransport technology is a high-speed, high-performance, point-to-point link for integrated circuits, and is designed to meet the bandwidth needs of tomorrow’s computing and communications platforms.
	www.hardocp.com /article.html?art=Mzc1 (1186 words)

	Macs to drive on HyperTransport links \| CNET News.com
		Apple is one of the founding members of the HyperTransport consortium of companies backing the standard, which includes Advanced Micro Devices, Cisco Systems and Sun Microsystems.
		HyperTransport links are one of the reasons behind the performance improvements in AMD's Opteron processor, according to company executives and others.
		While some have said that HyperTransport will be a feature in computers that will be shown at the conference and will appear shortly, the company's product strategy is often difficult to predict with complete accuracy.
	news.com.com /2100-1042_3-1016770.html (858 words)

	What is HyperTransport? - A Word Definition From the Webopedia Computer Dictionary
		HyperTransport technology is a high-speed, low-latency, point-to-point link designed to increase the communication speed between integrated circuits in computers, servers, embedded systems, and networking and telecommunications equipment up to 48 times faster than some existing technologies.
		HyperTransport technology is usually integrated directly into the processor, but in some cases HyperTransport is used as an integrated, high performance I/O bus that pipes PCI, PCI-X, USB, Firewire and audio/video links through the system.
		HyperTransport technology was invented at AMD with contributions from industry partners and is managed and licensed by the HyperTransport Technology Consortium.
	www.webopedia.com /TERM/H/HyperTransport.html (238 words)

	AMD HyperTransport Technnology - PCStats.com
		HyperTransport is the connection that is designed to provide the bandwidth that the new InfiniBand standard requires to communicate with memory and system components inside of next-generation servers and devices that will power the backbone infrastructure of the telecomm industry.
		HyperTransport technology is targeted primarily at the information technology and telecomm industries, but any application in which high speed, low latency and scalability is necessary can potentially take advantage of HyperTransport technology.
		HyperTransport technology is designed to support up to 32 devices per channel and can mix and match components with different bus widths and speeds.
	www.pcstats.com /releaseview.cfm?releaseID=504 (1583 words)

	HyperTransport boosts bus speeds
		HyperTransport is a new, high-speed bus architecture that reduces data bottlenecks and boosts the performance of communications equipment, including PCs, workstations, servers, Internet routers, optical switches, networks, central office equipment and cellular base stations.
		HyperTransport is a scalable architecture that provides more than an order-of-magnitude increase in bus transaction throughput over existing I/O bus technologies, such as PCI, PCI-X and AGP.
		HyperTransport is backward-compatible with the widely deployed PCI externally visible bus standard.
	www.networkworld.com /news/tech/2001/0716tech.html (778 words)

	Hyper about HyperTransport
		HyperTransport is an internal point-to-point link that interconnects integrated circuits (IC) on a motherboard and speeds the transfer of data between them.
		HyperTransport is designed for use in PCs and servers where a high-speed, scalable and low-latency technology is needed for database and other I/O intensive applications.
		With HyperTransport, each source IC is connected to a destination IC, and additional ICs may be daisy-chained from that destination IC.
	www.networkworld.com /newsletters/servers/2001/00932444.html (522 words)

	CommsDesign - HyperTransport Fabrics: The Next Wave in PCI?
		The HyperTransport fabric uses a low pin count, high speed, scaleable interconnect that is PCI compatible, while offering much higher bandwidth and a greater variety of supported topologies.
		By combining multiple HyperTransport PCI bridges with a HyperTransport switch, a system designer can choose to have as few PCI slots on a PCI bus as they feel is needed to achieve the level of fault isolation that they desire.
		The HyperTransport interconnect can be used between chips on a board, between boards in a chassis, and between adjacent chassis's in a system.
	www.commsdesign.com /story/OEG20011023S0059 (2386 words)

	HyperTransport Chip Group Signs IBM, EMC, TI, Others - Technology News by TechWeb
		The new companies push the group's membership past 50, and are expected to add to the perception of HyperTransport's protocols as a technology ready for the broadest possible markets including, with the addition of EMC and Network Appliance, the growing storage sector.
		According to the consortium, 30 million devices containing HyperTransport technology will ship this year, a number the group projected to grow to 200 million by 2006.
		HyperTransport technology is made available to consortium members on a royalty-free basis.
	www.techweb.com /wire/story/TWB20030811S0001 (285 words)

	HyperTransport(TM) Consortium Adopts GDA Technologies Platform As HyperTransport Compatibility Test Platform
		HyperTransport universal chip-to-chip interconnect technology replaces and improves upon existing multilevel buses used in systems such as personal computers, servers and embedded systems while maintaining software compatibility with PCI I/O technologies.
		HyperTransport interconnect technology employs a packet-based data protocol to eliminate many sideband signals (control and command signals) and supports asymmetric, variable width data paths.
		The HyperTransport Technology Consortium is a non-profit organization managed by its members that is dedicated to promoting HyperTransport technology as an open, freely available industry specification for high bandwidth chip-to-chip communications.
	www.ereleases.com /pr/2003-06-02g.html (956 words)

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