| | App. Note 3: IMS B004 IBM PC add-in board (Site not responding. Last check: 2007-11-05) |
 | | To complement the launch of the INMOS Transputer in October 1985, a number of evaluation boards were designed, to allow the world to evaluate the performance / ease of use of the transputer. |
 | | As the memory interface controller on the transputer generates all of the signals needed, the only logic required are buffer and latch devices, the buffers used to multiplex the Row and Column addresses, and to drive the long PCB tracks along the memory array. |
 | | As the transputer can be programmed to supply all the timing signals necessary to build an external memory system, the design of a transputer system consists mainly of latching and buffering address, data, and control lines to provide sufficient drive current to take board capacitance etc into account. |
| homepage.ntlworld.com /kryten_droid/inmos/ims_an003.htm (5974 words) |