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| | TechWeb: The Business Technology Network (Site not responding. Last check: 2007-10-15) |
 | | Once Leon has been fully verified, a more complete processor, Leon-2, will be developed with such additions as a PCI interface, floating-point unit, and DRAM controller. |
 | | Leon-1 includes a Sparc-compatible integer unit, separate instruction and data caches, a 32-bit memory bus with EDAC, PROM, and SRAM support; an interrupt controller; two 24-bit timers; two UARTs; a 16-bit I/O port; write protection; power-down function; and a watchdog timer. |
 | | Last October, Dennis Rose, operations manager for the advanced software products group at Xilinx, San Jose, Calif., downloaded an early version of the Leon and implemented it in the Xilinx EDA tool suite, but Rose said he did not run any code or test vectors on the simulation. |
| www.techweb.com /wire/29113020 (1234 words) |
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