| | Logic circuit - Patent 4802133 |
 | | A first type of the logic circuit comprises a combinational circuit having a plurality of internal nodes, node data latch circuits respectively connected to the preselected internal nodes for latching their logical states, and readout means for reading data latched in the latch circuits by using a data transfer clock. |
 | | A logic circuit according to claim 3, wherein said plurality of memory means are connected in series to serially input data to said plurality of memory means connected in series or output data therefrom. |
 | | Accordingly, where a logic circuit having a large scale combinational circuit is evaluated, by dividing the combinational circuit into suitable unit circuits to monitor nodes of respective unit circuits, it is possible to efficiently perform failure analysis with a small number of test vectors, thus facilitating the logical function test. |
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