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Topic: Logic synthesis

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	Logic synthesis - Wikipedia, the free encyclopedia
		Logic synthesis is a process by which an abstract form of desired circuit behavior (typically register transfer level (RTL) or behavioral) is turned into a design implementation in terms of logic gates.
		Logic synthesis is one aspect of electronic design automation.
		However, two-level logic circuits are of limited importance in a very-large-scale integration (VLSI) design; most designs use multiple levels of logic; As a matter of fact, almost any circuit representation in RTL or Behavioural Description is a multi-level representation.
	en.wikipedia.org /wiki/Logic_synthesis (883 words)

	HDL Planet's Synthesis Page
		Synthesis is a blanket term which refers to the automatic translation of HDL code into an equivalent netlist of digital cells.
		In layman's terms, synthesis is a process which translates a description of the function a module should perform (the behavior) into a composition, that is, an interconnection of elements (the structure).
		Logic synthesis is the task of generating a structural view of a logic-level model.
	hdlplanet.tripod.com /synthesis/synthesis.html (1425 words)

	Challenges of CAD Development for Datapath Design
		Logic synthesis, which transforms a design from RTL to circuit level, has been widely studied for control logic.
		We propose a novel methodology for logic synthesis of datapath circuits, where the datapath regularity is first extracted and then the circuit is mapped to a desired technology while preserving regularity.
		The regularity index is defined as the percentage of the number of logic components in all the templates to the total number of logic components in the circuit.
	developer.intel.com /technology/itj/q11999/articles/art_3d.htm (2211 words)

	Blaming the Button
		Since your garden variety logic synthesis tool (the one that's busy making your design 70X too large) doesn't know anything about the placement that will eventually be the big determiner of your timing success or failure, the speed of your design is left almost entirely in the hands of an auto-placer.
		Synthesis is first, and it is the final arbiter of the specific components and interconnect that will form your netlist.
		Logic synthesis, of course, initially works in the dark because it has no idea what the eventual placement and routing will be.
	www.fpgajournal.com /articles_2006/20060425_button.htm (1976 words)

	SOCcentral: Logic and Physical Synthesis: Should There Be a Difference? (SOCcentral 16959) (Site not responding. Last check: 2007-09-17)
		Consider this: For a design with 100 adders, the logic designer was able to meet timing after logic synthesis and all adders were Ripple Carry adders to give the smallest area.
		In addition to the capacity of the synthesis tool, it is important to achieve early visibility into problems that can occur later in the physical design, which will help avoid iterations later in the design process.
		Logic synthesis and physical synthesis should not be separated because every front-end designer has a certain amount of physical design knowledge.
	www.soccentral.com /results.asp?EntryID=16959 (1151 words)

	Mixed PTL/Static Lgoic
		We present a single-rail and dual-rail mixed PTL/Static logic synthesis method and compare the results of the synthesized single-rail and dual-rail mixed PTL circuits to those of conventional static CMOS circuits synthesized using a commercial logic synthesis tool from Synopsys in an experimental 0.1um technology.
		When the synthesis mode is dual-rail, the dual-rail mixed PTL circuits were generated by replacing the single-rail PTL and static cells with corresponding dual-rail cells.
		In this proposed synthesis flow, the objective is to minimize the cost defined as the total transistor area under delay constraints.
	www.engr.colostate.edu /vlsi/MixedPTL/MixedPTL.html (1874 words)

	EDN Access -- 03.17.94 Probing the limits of LOGIC SYNTHESIS
		Moreover, the fundamental limit on logic synthesis is the designer: Synthesis tools won't turn a bad design into a good one-or convert a bad designer into a competent one.
		Logic synthesis is only a small part of the overall design effort.
		In synthesizing combinatorial logic with these cores, the registers tend to be underused, and, conversely, in synthesizing register-oriented blocks, the core logic tends to be un- derutilized.
	www.edn.com /archives/1994/031794/06dfcov.htm (3710 words)

	Does Single-pass Physical Synthesis Work for FPGAs?
		Physical synthesis, which allows logic restructuring based on placement, works extremely well over a broad range of designs, and is the block-level timing closure technology of choice.
		Ideally, interaction between the logic synthesis and the physical implementation would be contained in one environment.
		To be highly efficient, however, next-generation physical synthesis tools for complex FPGAs must not only tightly integrate the logical and physical aspects of a design within a single data model, they must also respect the results delivered by the FPGA vendor’s PandR tools.
	www.fpgajournal.com /articles/20041026_mentor.htm (2136 words)

	CBG Orangepath: HPRLS Direct Synthesis of Logic Using a SAT Solver and Other Search Techniques
		In the basic case, the problem to be solved is phrased as a formal logic function and the behaviour of the FPGA given a given programming is expressed similarly.
		A suitable hardware target for this class of problem is a sea of CLBs (configurable logic blocks) where each element may either be a four input combinatorial function or the same followed by a D-type flip-flop.
		The behaviour of the pseudo FPGA is readily converted to a formal logic specification using conventional techniques.
	www.cl.cam.ac.uk /~djg11/wwwhpr/dslogic.html (1604 words)

	Amazon.com: Logic Synthesis Using Synopsis: Books: Pran Kurup,Taher Abbasi (Site not responding. Last check: 2007-09-17)
		Logic Synthesis Using Synopsys®;, Second Edition is for anyone who hates reading manuals but would still like to learn logic synthesis as practised in the real world.
		Logic Synthesis Using Synopsys®;, Second Edition is an updated and revised version of the very successful first edition.
		Logic Synthesis Using Synopsys®;, Second Edition has been written with the CAD engineer in mind.
	www.amazon.com /Logic-Synthesis-Using-Synopsis-Kurup/dp/079239786X (1354 words)

	Multi-Valued Logic Synthesis
		Logic synthesis for multi-valued hardware devices such as current-mode circuits.
		Initial manipulation of a hardware description before it is encoded into binary and processed by standard binary logic synthesis programs; MV is a natural way to describe procedures at a higher level.
		The MVSIS logic network is an extension of the traditional boolean network to include multi-valued nodes, each with its own range.
	embedded.eecs.berkeley.edu /mvsis/mvlogic.html (408 words)

	LOGIC SYNTHESIS (Site not responding. Last check: 2007-09-17)
		Logic synthesis provides a link between an HDL (Verilog or VHDL) and a netlist similarly to the way that a C compiler provides a link between C code and machine language.
		Once a behavioral HDL model is complete, two items are required to proceed: a logic synthesizer (software and documentation) and a cell library (the logic cells—NAND gates and such) that is called the target library.
		Following logic synthesis the design is simulated again, and the results are compared with the earlier behavioral simulation.
	www-ee.eng.hawaii.edu /~msmith/ASICs/HTML/Book/CH12/CH12.htm (400 words)

	An ECL Logic Synthesis System
		While logic synthesis technology is now widely used in the design of CMOS Application Specific Integrated Circuits (ASICs), it is not yet widely accepted in the commercial ECL ASIC design community.
		There are many logic synthesis systems that have addressed specific aspects of different circuit technologies with various algorithms and optimization techniques [1] [2] [3] [4] [5] [6] [7] [8].
		Wired logic is often permitted within ECL technologies and there are a number of connection rules controlling the proper construction of wired logic.
	www.sigda.org /Archives/ProceedingArchives/Dac/Dac91/papers/1991/dac91/06_3/6_3.htm (4105 words)

	MVSIS: Logic Synthesis and Verification
		The MVSIS group at Berkeley studies logic synthesis and verification for VLSI design.
		The main focus is on new optimization algorithms that improve the quality of circuits generated by automatic synthesis tools and, at the same time, are scalable for practical use.
		Although the initial focus of MVSIS was on logic minimization for multivalued networks, over time it has developed into a full featured tool for synthesis and verification in general.
	embedded.eecs.berkeley.edu /Respep/Research/mvsis (260 words)

	Logic Program Synthesis - DEVILLE, LAU (ResearchIndex) (Site not responding. Last check: 2007-09-17)
		Logic program synthesis is interpreted here in a broad way; it is concerned with the following question: given a specification, how do we get a logic program satisfying the specification?
		Logic programming provides a uniquely nice and uniform framework for program synthesis since the specification, the synthesis process and the resulting program can all be expressed in logic.
		3 Towards a formal framework for deductive synthesis of logic..
	citeseer.ist.psu.edu /deville93logic.html (1692 words)

	Hassoun, Soha; Sasao, Tsutomu; Hassoun, Soha: Logic Synthesis and Verification
		Research and development of logic synthesis and verification have matured considerably over the past two decades.
		Logic Synthesis and Verification provides a state-of-the-art view of logic synthesis and verification.
		The book is intended for seniors, graduate students, researchers, and developers of related Computer-Aided Design (CAD) tools.From the foreword: "The commercial success of logic synthesis and verification is due in large part to the ideas of many of the authors of this book.
	www.forbesbookclub.com /bookpage.asp?prod_cd=I7J2G (244 words)

	TechOnline \| Current Chip Design Flow is Flawed
		As originally developed, logic synthesis was a tool for abstracting a gate-level design representation from an RTL representation, according to timing constraints a designer would place on the design.
		Physical synthesis does not adequately address crosstalk and signal-integrity problems, since these problems are very layout dependent and the physical-synthesis tool does not have knowledge of the final chip layout.
		Front-end tools are critical for providing RTL synthesis along with design performance and chip-size estimates prior to the chip's physical implementation—a virtual prototype of the design—with fast area and timing estimates and an RTL-to-netlist flow that takes just a few hours, not days.
	www.edadesignline.com /showArticle.jhtml?articleID=192200410 (2470 words)

	Logic Synthesis (Site not responding. Last check: 2007-09-17)
		The history of logic synthesis algorithm dated back to the 1950's and 1960's.
		The breakthrough in logic synthesis was remarked by the invention of ESPRESSO in 1984.
		The use of kernel and kernel extraction algorithm further improved the performance of logic synthesis algorithm.
	www.ccse.kfupm.edu.sa /~sarif/logic_synthesis.htm (191 words)

	EETimes.com - Logic synthesis 'dying,' Magma's Madhavan says
		Madhavan then discussed the history of logic synthesis, which he said hit a "middle age crisis" around 1995 when block sizes were limited and timing budgets were done manually.
		But then, he said, logic synthesis began to move into "old age" with no physical knowledge, a netlist that couldn't be implemented, and timing that couldn't be achieved in layout.
		Physical synthesis, which linked synthesis with placement, brought a "transfusion of energy into the old age of the technology," Madhavan said.
	www.eetimes.com /showArticle.jhtml?articleID=160403782 (661 words)

	IBM Research \| Projects \| Logic Synthesis and Physical Design
		Gain-based synthesis uses a delay-centric approach to logic optimization which naturally targets timing optimization.
		A gain based synthesis methodology, being intrinsically load independent, focuses on restructuring a circuit towards a placement independent optimum.
		The solution to turn around time reduction is to integrate synthesis and placement into a single tool, therefore replacing the synthesis-placement loop by a single pass.
	www.research.ibm.com /da/logic.html (321 words)

	Thapliyal: "A Beginning in the Reversible Logic Synthesis of Sequential Circuits" (Site not responding. Last check: 2007-09-17)
		The synthesis of reversible logic differs significantly from traditional irreversible logic synthesis approaches as fan-outs and loops are not permitted in the reversible logic synthesis.
		Further, reversible logic synthesis of sequential logic differs from combinational logic in that the output of the logic device is dependent not only on the present inputs to the device, but also on past inputs; i.e., the output of a sequential logic device depends on its present internal state and the present inputs.
		The important reversible gates used for reversible logic synthesis are Feynman Gate, Toffoli Gate, and New Gate and Fredkin gate.
	klabs.org /mapld05/abstracts/1012_thapliyal_2_a.html (397 words)

	Amazon.com: VHDL: A logic synthesis approach: Books: D. Naylor,S. Jones (Site not responding. Last check: 2007-09-17)
		The use of VHDL for constructing logic synthesisers is one of the aims of the book; the second is the application of the tools to the design process.
		Introduces the principles of VHDL by focusing on the syntax of the language and the way in which different constructs are used together to solve design issues.
		The traditional way to design electronic circuits is as follows: firstly, specification of the behaviour of the systems; secondly simulation of the behaviour; thirdly, transformation of this behavioural description into a dataflow; fourthly, structural description, verifying along the way that each decomposition stage maintains the exact behaviour as detailed in the behavioural specification.
	www.amazon.com /VHDL-synthesis-approach-D-Naylor/dp/0412616505 (1147 words)

	12.7 Finite-State Machine Synthesis (Site not responding. Last check: 2007-09-17)
		Omit any special synthesis directives and let the logic synthesizer operate on the state machine as though it were random logic.
		Most synthesis tools require that you write a state machine using a certain style—a special format or template.
		Synthesis tools may also require that you declare an FSM, the encoding, and the state register using a synthesis directive or special software command.
	www-ee.eng.hawaii.edu /~msmith/ASICs/HTML/Book2/CH12/CH12.7.htm (1305 words)

	Logic Synthesis Tools
		This wide set of logical functions opens new doors to the creation of new logical circuits that might then be automatically redesigned using certain kinds of gates (All Gates, Not-And-Or Only, Nand Only, Nor Only, Mux System, Reed-Muller System).
		These building blocks might represent any kind of logical expression (not just functions of 1-4 arguments) and are therefore ideal to design complex models composed of several simpler components.
		Scoring logic circuits is not current practice, but you can make use of the scoring engine of GeneXproTools 4.0 just to check your code or for the fun of it.
	www.gepsoft.com /gxpt4kb/Chapter01/Section2/SS4.htm (3249 words)

	Switching Theory for Logic Synthesis
		Switching Theory for Logic Synthesis covers the basic topics of switching theory and logic synthesis in fourteen chapters.
		Switching Theory for Logic Synthesis is based on the author's lectures at Kyushu Institute of Technology as well as seminars for CAD engineers from various Japanese technology companies.
		Switching Theory for Logic Synthesis will be of interest to CAD professionals and students at the advanced level.
	www.ateworld.com /books/view_details.cfm?id=159 (238 words)

	Synthesis - Wikipedia, the free encyclopedia
		Synthesis (from the ancient Geek σύνθεσις σύν (with) and θεσις (placing)), is commonly understood to be an integration of two or more pre-existing elements which results in a new creation.
		The term is broad in meaning and can apply to physical, ideological, and/or phenomenological entities.
		In chemistry, chemical synthesis is the process of forming a particular molecule from chemical reagents.
	en.wikipedia.org /wiki/Synthesis (411 words)

	EETimes.com - Getting the most out of RTL logic synthesis
		But tools change after 15 years, and I realized the other day while teaching a logical synthesis workshop, how much the "rules" for RTL synthesis have really changed, with the advent of new synthesis tools, increased abilities of the physical back-end tools, better compute resources and faster operating systems.
		This allows you to simplify constraint management, reduce the number of synthesis scripts needed to compile the design (as well as reduce the number of synthesis licenses) and gives the synthesis tool more visibility into the interoperability characteristics (fan-out, load, timing) between blocks in the hierarchy during optimization.
		You can still specify what your DRCs are for a design during synthesis, but don't worry if they are all not perfectly satisfied by the logical synthesis tools.
	www.eetimes.com /showArticle.jhtml?articleID=190300358 (1299 words)

	Synopsys Logic Synthesis Datasheet (Site not responding. Last check: 2007-09-17)
		Hundreds of companies in the computer, telecommunications, semiconductor, aerospace, and electronic systems industries use Synopsys synthesis for large and small designs.
		Synopsys' synthesis has become the de facto industry standard.
		This includes such features as synthesis for virtually any clocking scheme, automatic constraint derivation, embedded point-to-point timing analysis, and industry-supported links to layout.
	www.synopsys.com /products/logic/synthesis_ds.html (216 words)

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