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Topic: MMX


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In the News (Mon 30 Nov 09)

  
  MMX - Wikipedia, the free encyclopedia
MMX is a SIMD instruction set designed by Intel, introduced in 1997 in their Pentium MMX microprocessors.
However, one of the main concepts of the MMX instruction set is the concept of packed data types, which means instead of using the whole register for a single 64-bit integer (quadword), two 32-bit integers (doubleword), four 16-bit integers (word) or eight 8-bit integers (byte) may be used.
MMX is rumoured to stand for MultiMedia, Multiple Math or Matrix Math eXtension, but officially it is a meaningless initialism trademarked by Intel.
en.wikipedia.org /wiki/MMX   (640 words)

  
 MMX   (Site not responding. Last check: 2007-11-07)
MMX offers an exciting opportunity to improve some types of multimedia performance, often dramatically, but it's going to take a new generation of software applications to take advantage of it.
MMX is the first major enhancement of Intel's ubiquitous PC processor line since the '386 chip in 1985.
MMX expands on the native abilities of the Pentium, called the "Instruction Set", to speed up some of the internal processes.
www.stagetools.com /bill/Mmx.htm   (760 words)

  
 BDTI - Intel MMX Pentium
The architecture of the MMX Pentium is the same as that of the original Pentium except for number of improvements, the most visible of which are deeper pipelines, larger caches, improved branch prediction, and 57 new instructions intended for DSP, image, and video processing—the MMX instructions.
As in the original Pentium, the MMX Pentium provides both a fixed-point integer data path that allows up to two operations to be executed simultaneously, and a floating-point data path that allows one operation to be performed at a time.
MMX instructions are ``single instruction multiple data'' instructions that operate on the 64-bit-wide MMX registers or on memory in one of the above configurations.
www.bdti.com /procsum/mmx_pent.htm   (627 words)

  
 MMX Primer
The MMX technology is designed to accelerate multimedia and communications applications by including new instructions and data types that allow applications to achieve a new level of performance.
MMX technology introduces four new data types: three packed data types (bytes, words and doublewords, respectively being 8, 16 and 32 bits wide for each data element) and a new 64-bit entity.
Aliasing the MMX state upon the floating-point state does not preclude applications from executing both MMX routines and floating point routines, but the developer cannot freely interleave MMX and floating point instructions, and he must insert an EMMS instruction before switching between MMX and floating point code sequences.
www.tommesani.com /MMXPrimer.html   (934 words)

  
 Intel® Pentium® Processors with MMX™ Technology for Embedded Computing - Overview
In addition, the MMX technology versions of the processor double on-chip code and data caches to 16 Kbytes and feature improved branch prediction, an enhanced pipeline and deeper write buffers for improved performance.
MMX technology provides 57 new instruction sets to improve processor performance in traditional digital signal processor [DSP] applications, including the graphics, audio and voice processing capabilities now emerging as value-added features in high-performance embedded products.
MMX technology can potentially eliminate the requirement for DSP chips in embedded applications such as video kiosks, telecommunications devices and POS terminals.
www.intel.com /design/intarch/mmx/mmx.htm   (560 words)

  
 MacKiDo/Myths/MMX
MMX is a technology that was created to allow Intel to lock users into a proprietary instruction set and stop the cloning of their chips.
MMX is nothing new -- it is just a new name for an old concept -- one that (ironically) IBM and the Power Architecture (what the PowerPC is based on) helped innovate.
MMX is not a bad way for Intel to respond to its weaknesses as compared to the PowerPC, and it almost catches up.
www.mackido.com /Myths/MMX.html   (1413 words)

  
 Chapter Eleven The MMX Instruction Set   (Site not responding. Last check: 2007-11-07)
The MMX instruction set supports four different data types: an eight-byte array, a four-word array, a two element double word array, and a quadword object.
One drawback to the MMX instruction set is that it is not general purpose.
MMX instructions access memory using the same addressing modes as the standard integer instructions.
webster.cs.ucr.edu /AoA/Windows/HTML/TheMMXInstructionSet.html   (3686 words)

  
 MMX Technology Overview
Briefly, MMX refers to a new set of instructions that speed up repeated operations on small data types such as bytes and words, which are the types of operations that dominate many multimedia operations (such as image and audio processing and compression).
MMX is exactly this idea, but goes one step further: it uses 64-bit registers so that eight 8-bit values can be operated on simultaneously.
MMX instructions work with "packed data", which means multiple pieces of data smaller than 64 bits packed into a 64-bit register.
www.cs.unt.edu /~srt/2010.s99/mmx.html   (2778 words)

  
 MMX   (Site not responding. Last check: 2007-11-07)
MMX (Matrix Math eXtensions) is a SIMD instruction set designed by Intel, introduced in their Pentium MMX microprocessor s.
Each of the eight 64-bit MMX vector registers, aliased on the eight existing floating point registers, could represent two 32-bit integer s, four 16-bit short integers, or eight 8-bit chars.
Intel later addressed these shortcomings with SSE, a greatly expanded set of SIMD instructions with 32-bit floating point support and an additional set of 128-bit vector registers that made it easy to perform SIMD and FPU operations at the same time.
www.serebella.com /encyclopedia/article-MMX.html   (329 words)

  
 MMX Instructions
In particular, MMX instructions are designed to allow processing of large amounts of similar data at once, using a single instruction.
Since MMX is an instruction set extension, this means that processors that support it will run all the software that ran on early processors, but not the other way around; MMX processors are backward compatible.
Bear in mind that the whole point of MMX is to provide performance improvements by doing functions in hardware that used to be done using less-efficient "regular" x86 instructions.
www.pcguide.com /ref/cpu/arch/int/instMMX-c.html   (511 words)

  
 Pearl Drums
MMX are formed using Pearl’s exclusive Heat/Compression Shell Molding System that employs high temperatures and pressure to create the strongest and most resonant shells in the world.
MMX mounted toms are available in standard, alternative, and power depths from 8" to 16" in diameter.
MMX bass drum are offered in 18" to 24" diameters in standard and power depths.
www.pearldrum.com /04_nuupdates/masters/mmx_feat.html   (483 words)

  
 21st-Intel MMX vs. Microsoft Talisman
Instead, the MMX uses the Pentium's existing 80 bit floating point registers, of which there are eight, and aliases them for use by multimedia applications.
But these FP and MMX operations cannot be mixed together in the same application without incurring a big performance hit, as this context switch takes a heavy toll in CPU cycles.
MMX uses a classic, parallel processing technique, known as single instruction, multiple data operation, or SIMD.
www.vxm.com /21R.98.html   (5038 words)

  
 How to optimize code for MMX processors.   (Site not responding. Last check: 2007-11-07)
MMX is good for low-level pixel manipulation, digital signal processing, 3D geometry, and much more.
MMX has instructions to pack and unpack data; these are critical to one-pixel-per-instruction applications.
Since MMX instructions that access memory can only be issued in the U pipe, only one may be issued per cycle.
web.novalis.org /documents/mmx.html#part2   (2433 words)

  
 A+ forum - difference between pentium I and II   (Site not responding. Last check: 2007-11-07)
I know that MMX came out on the P55c but what I think azimuth40 is trying to say that Intel did not reconize as an upgrade to the PI as MMX is not mentioned in the tables for PI.
There was a press release for pentium 1 with mmx right before the pentium 2, about 90 days as I recall, but you could not get a tray of them through the channel.
MMX is a new set of instructions (57 new integer instructions, four new data types, and eight 64 bit registers), which expand the capabilities of the CPU.
www.examnotes.net /archive15-2002-7-50117.html   (4164 words)

  
 11.9 The MMX Programming Paradigm   (Site not responding. Last check: 2007-11-07)
While it is possible to directly use various MMX instructions the same way you would the general purpose integer instructions, one phrase comes to mind when working with MMX: think parallel.
Since the MMX registers are 64-bits wide, you can double the speed of certain data movement operations by using MMX registers rather than the 32-bit general purpose registers.
The MMX instructions, with their SIMD orientation, are generally useful for manipulating a large amount of data organized as byte, word, or double word arrays where the MMX instructions can calculate several values in parallel.
webster.cs.ucr.edu /AoA/Linux/HTML/TheMMXInstructionSeta3.html   (2702 words)

  
 MMX : Computer Hardware Buyers’ Glossary   (Site not responding. Last check: 2007-11-07)
Intel wants you to think MMX is a true digital signal processor, but it is not.
Technically, MMX is a SIMD (Single Intruction Stream Multiple Data) auxiliary 64-bit processor integrated with the CPU than can handle 2 identical 32-bit calculations at once, 4 16-bit or 8 8-bit.
MMX is primarily for jazzing up sound and 3D graphics in games.
mindprod.com /bgloss/mmx.html   (245 words)

  
 MMX: Facts and details from Encyclopedia Topic   (Site not responding. Last check: 2007-11-07)
The pentium is a fifth-generation x86 architecture microprocessor by intel which first shipped on march 22, 1993....
MMX is rumoured to stand for MultiMedia eXtensions or Multiple Math eXtension, EHandler: no quick summary.
Sse3, also known by its intel code name prescott new instructions or pni, is the third iteration of the sse instruction set for the ia-32 architectur...
www.absoluteastronomy.com /encyclopedia/m/mm/mmx2.htm   (1248 words)

  
 Search: MMX tutorial - MetaCrawler   (Site not responding. Last check: 2007-11-07)
MMX is good for low-level pixel manipulation, digital signal processing,...
MMX and how it works, as well as why and when to use it.
MMX icon set you will notice that Mikkel follows the Aqua interface guidelines as set by Apple...
www.metacrawler.com /info.metac/search/web/MMX%2Btutorial   (292 words)

  
 An illustrated Guide to 6th generation CPUs
With the Pentium MMX we had the first of several improvements of the microprocessor's set of instructions.
In 1995 the Pentium processor was expanded with the so-called MMX instructions.
However, that was not because of the MMX instructions.
www.karbosguide.com /hardware/module3e09.htm   (1014 words)

  
 BYTE.com
MMX instructions use only the 64-bit mantissa portion of the 80-bit FP registers, ign oring the 16-bit exponent portion.
MMX instructions can pack several data types into these 64-bit regis ters: packed bytes (eight per register), packed words (four per register), packed doublewords (two per register), and a quadword (one 64-bit value per register).
MMX isn't Intel's only new approach to accelerating 3-D. Another new extension for 3-D accelerators is the Advanced Graphics Port (AGP).
www.byte.com /art/9610/sec6/art3.htm   (726 words)

  
 Computable Nieuws: 10/01/97 - Pentium met MMX lijkt kind met waterhoofd   (Site not responding. Last check: 2007-11-07)
De chipgigant prijst MMX aan als 'de belangrijkste verbetering van de architectuur van de laatste tien jaar'.
Nu de Pentium met MMX werkelijkheid is geworden, stellen zelfs de prestatiemetingen die Intel zelf naar buiten brengt teleur.
Het zwakke punt van MMX omzeilt Intel door geen benchmarks te geven voor de verwerkingen van drijvende komma- en gehele getallen-berekeningen.
www.computable.nl /artikels/archief7/d02hb7km.htm   (735 words)

  
 Other Experimental Platforms for Linux
MMX instructions requires that you be very nearly coding in assembly language in order to recognize instruction patterns that might be sped up by replacing them by an MMX instruction.
As a result of that, as well as the consideration that CPUs and assemblers don't universally support the MMX instructions, the usefulness of MMX on Linux has been, thus far, fairly limited.
So MMX does make sense but it's pretty hard to code for it and it's certainly not quite useful in GCC I think, as mixing integer and MMX instructions seems to be a loss in most cases, even on a PII (Even if there is no FPU used).
linuxfinances.info /info/linuxcpus.html   (913 words)

  
 GameSpot:Video Games PC Xbox 360 PS3 Revolution PSP DS PS2 PlayStation 2 GameCube GBA PlayStation 3
In other words, the impact of MMX alone was minimal, while the impact of the 3DFX board was monstrous.
To use MMX for today's games in the hopes of vast performance improvements is a bit like trying to squeeze a square peg into a round hole.
Although Epic may praise the performance enhancements made possible by MMX, it is aware that MMX working alongside a 3-D controller is the ideal setup.
www.gamespot.com /features/mmx/html/mmx_fmg.html   (752 words)

  
 Board FrazPC.pl - Jak zablokować MMX
Ale MMX to czesc funkcji procesroa, a nie jakas wkladka.
Jak czesc CPU jest zepsuta, to nie tylko MMX, ale i cos innego tez moze byc.
MMX to jeden z tych gości w kombinezonie tyle że zwariowany i w innym kolorze.
www.frazpc.pl /b/6276   (413 words)

  
 Intel hopes new chips will draw interest
Machines equipped with the new Intel Pentium MMX chips were shown off with promises of substantially improved graphics, video, sound and communications.
As for the significance of the MMX designation, Intel said the letters are neither an acronym nor an abbreviation and merely were chosen to trademark the new chip.
Intel, based in Santa Clara, Calif., is currently offering MMX chips at 166 and 200 megahertz for desktop machines and at 150 and 166 MHz for laptop computers.
www.lubbockonline.com /news/011297/intel.htm   (779 words)

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