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Topic: Microsequencer

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	Dual fetch microsequencer - Patent 4439827 (Site not responding. Last check: 2007-10-22)
		1 is a dual fetch microsequencer embodying the invention;
		7 is a alternate embodiment of the microsequencer of FIG.
		As is well known to those skilled in the art, some microsequencer mechanisms such as those used in array processors involve the execution of a relatively large number of microprogram routines that require storage capacity far in excess of the commonly used microprogram memories.
	www.freepatentsonline.com /4439827.html (8489 words)

	Register stack for a bit slice processor microsequencer - Patent 4835738 (Site not responding. Last check: 2007-10-22)
		The microsequencer 12 and bit slice ALU 10 are interfaced with the microinstruction bus 14 which is a uni-directional bus.
		The microsequencer 12 is therefore instructed as to whether to execute a branch, a subroutine jump, a subroutine return, or simply increment to the next microinstruction address in the microprogram memory 18.
		Data is input to the microsequencer on a Y-bus 36 to a buffer 38.
	www.freepatentsonline.com /4835738.html (7338 words)

	esp@cenet description view (Site not responding. Last check: 2007-10-22)
		Microcode is provided for the microsequencer or bit slicer to enable it to scan the OIDs and respond to the data inputted from the OIDs.
		The microsequencer is located physically and functionally between the Z80 microprocessor and the operator input devices and is a bipolar bit-slice microprocessor driven by writeable microcode which scans 128 sub-channels in an endless sequence servicing the OIDs and buffering data bidirectionally between them and the Z80.
		It is synchronised with the microsequencer scan by a circuit 76 and the microprogram so that the T-stat is `one` for exactly one complete cycle every 1/16th of a second.
	v3.espacenet.com /textdes?&DB=EPODOC&IDX=EP94800 (6644 words)

	Real World Technologies - What's Up With Willamette? (Part 2)
		In execute mode, the trace cache detects the presence of the microcode entry point in the tag and transitions to a special operating mode in which uops generated by a microcode sequencer unit are steered into the trace cache output path.
		Upon completion of a complex x86 instruction by the microsequencer, the Willamette trace cache resumes normal trace segment fetching from the next data line.
		The process of entering and exiting microsequencer mode is carefully integrated into normal trace cache operation and can be accomplished with very little overhead.
	www.realworldtech.com /page.cfm?ArticleID=RWT040400000000&p=3 (900 words)

	Freescale Enhanced Time Processor Unit (eTPU) FAQs - ASH WARE Inc. (Site not responding. Last check: 2007-10-22)
		The eTPU consists of a single microsequencer and dedicated channel hardware (there are 16 channels in the TPU and 64 total channels in the eTPU).
		Because the hardware is autonomous, the usual latency penalties associated with an undedicated microsequencer are not incurred.
		The microsequencer responds to the service request (after servicing any existing requests based on an optimized scheduling mechanism) and prepares the channel hardware for the next event.
	www.ashware.com /faqs/etpu.htm (1032 words)

	Konrad Zuse
		A microsequencer consisted, in the case of the Z3, of a rotating arm which advanced one step in each cycle of the machine.
		The microsequencer can be thought of as a kind of hardwired program that implemented more complex instructions out of atomic binary operations.
		Multiplication by ten was already effectively present as atomic operation in the Z3 (and was necessary to transform a number from the binary to the decimal notation) but was hidden from the programmer.
	www.zib.de /zuse/Inhalt/Kommentare/Html/0680/0680.htm (1434 words)

	MICROSEQ(9) NetBSD Kernel Manual MICROSEQ(9)
		Before using microsequences, you are encouraged to look at atppc(4) microsequencer implementation and an example of how using it in vpo(4).
		The microsequencer is executed either at ppbus or adapter level (see ppbus(4) for info about ppbus system layers).
		Most of the microsequencer is executed at atppc level to avoid ppbus to adapter function call overhead.
	netbsd-ppbus.sourceforge.net /documentation/microseq.9.html (1198 words)

	microseq(9)
		The purpose of this document is to encourage developers to use the microsequencer mechanism in order to have: 1.
		The microsequencer The microsequencer is executed either at ppbus or adapter level (see ppbus(4) for info about ppbus system layers).
		Most of the microsequencer is executed at ppc level to avoid ppbus to adapter function call over- head.
	www.omc.net /cgi-bin/man.cgi?section=9&topic=microseq (1281 words)

	NJIT - ECE495 Experiment 2 - Introduction to Microsequencer Design
		The objective of this experiment is to learn the basic operating principles of microsequencers.
		The inputs to this control logic are generated by the control unit and also taken from the instruction opcode.
		Note that the microsequencer does not actually execute the instruction; it generates control signals which cause other hardware within the CPU (such as the ALU) to execute the instruction.
	coefs2.njit.edu /ECE495/ece495-II.htm (1134 words)

	Programmable image transform processor for digital image processing - Patent 6597394
		Therefore, via the VLIW and the pipeline registers, the microsequencer 602 controls the multiplexor 608, the shift register 610, the coefficient RAM 606, the latches 640-643, latches 646, 648, latch 650, multiplexor 670 and the accumulator 680.
		The camera's microprocessor releases the microsequencers and the microsequencers will execute the loaded procedures and the handshaking logic between the output addresser and the arithmetic block will cause the data to be transferred from the arithmetic block 450 to the output addresser.
		When the microsequencers 431, 441 and 602 are released from the halt state by the camera's microsequencer, the microsequencers 431, 441 and 602 will execute the loaded procedures from their respective control stores.
	www.freepatentsonline.com /6597394.html (14613 words)

	Direct memory access controller (EP0328450B1)
		The programmable logic array part is coupled to the internal bus and outputs control information required during a next transfer cycle during one transfer cycle which corresponds to a predetermined number of system clock cycles.
		Each data transfer between the input/output device and the memory device is controlled by the microprograms of the microsequencer in cooperation with the programmable logic array part.
		a microsequencer (21) which controls by microprograms the system state during each of a plurality of system clock cycles comprised in a present transfer cycle, that is the microsequencer (21) controls the operating states of parts of the direct memory access controller in units of one system clock cycle during a present transfer cycle; and
	www.delphion.com /details?pn=EP00328450B1 (243 words)

	SP0256 Instruction Set
		The SP-0256 addresses these issues by adding a small microsequencer to the device which is responsible for updating speech core's LPC coefficients.
		This core operates largely independently of the microsequencer, except that it relies on the microsequencer to receive parameter updates, and it notifies the microsequencer when it completes an utterance.
		The microsequencer is a simple machine which focuses soley on copying parameters from its input to the filter parameter registers in the filter core.
	spatula-city.org /~im14u2c/intv/tech/sp0256_instr_set.html (3559 words)

	A CAMAC Serial Link Concentrator for Multibus II (Site not responding. Last check: 2007-10-22)
		Overall operation of the SLC is managed by an 80C186 microprocessor in conjunction with a stand alone microsequencer.
		The register interface is managed by the 80C186 while the microsequencer supervises the serial data link.
		The communications test confirms the ability of the 80C186 to communicate with the microsequencer.
	www-bd.fnal.gov /controls/hardware_slackey/slc.htm (1621 words)

	Microsequence Analysis of Natural Peptides
		Purified fractions that contain primarily a single peptide and are sufficiently concentrated (50 pmol/5ml) are loaded directly onto a microsequencer.
		Peptides that are too dilute are concentrated on a microbore HPLC before they are loaded on the microsequencer.
		The Core director assists CURE investigators in purifying samples until they are suitable for microsequence analysis, assures that the samples are properly delivered, and helps investigators interpret results.
	www.cure.med.ucla.edu /facilities/facilities_peptidef.html (349 words)

	Chapter 6
		T/F p269 Every microsequencer must be able to access the correct execute routine.
		Answer: As in high-level code, a microsequencer uses microsubroutines for sequences of actions that are performed in more than one routine in microcode.
		However, there is a tradeoff in using microsubroutines: The microsequencer hardware must be enhanced to implement the microsubroutine calls and returns.
	polaris.umuc.edu /~dciuffre/Ch6and7review.htm (1205 words)

	Re: lynx-dev Concerning the use of abort in the source of lynx
		A deeper analysis shows that the closest familiar equivalent of the ribosoma is the microsequencer unit of a processor, which executes microcode from the control store.
		As any logic design textbook would show, any sequential circuit (i.e., any circuit whose output and subsequent behavior depends on the sequence of all prior inputs) can be viewed as a finite state machine (FSM), which is most directly modeled as a register holding the state, the next state function, and the output function.
		The ribosoma that directly processes it is the microsequencer, and the two-bit codes in the amino acid residues are the inputs to its FSM.
	www.mail-archive.com /lynx-dev@sig.net/msg03851.html (896 words)

	Microsequencer - Encyclopedia Glossary Meaning Explanation Microsequencer (Site not responding. Last check: 2007-10-22)
		Here you will find more informations about Microsequencer.
		In the field of computer architecture and engineering, a sequencer or microsequencer, is a part of a control unit of a CPU.
		They tend to have multiple cooperating micromachines with specialized logic to detect and handle interference between the micromachines.
	www.encyclopedia-glossary.com /en/Microsequencer.html (189 words)

	Xcell Journal Online -- scc-II Microsequencer article (Site not responding. Last check: 2007-10-22)
		We specifically constructed the microsequencer to fill the gap between low-level FSM solutions and high-level microcontroller designs.
		However, existing high-level languages are not designed for microsequencer applications.
		Conclusion We have presented a microsequencer, the scc-II, which is new to conventional FPGA design practices.
	www.xilinx.com /publications/xcellonline/partners/xc_scc2.htm (1334 words)

	HI7188 Device Information (Site not responding. Last check: 2007-10-22)
		Communication with the HI7188 is performed via the serial I/O port, and is compatible with most synchronous transfer formats, including both the Motorola/Intersil 6805/11 series SPI, QSPI and Intel 8051 series SSR protocols.
		The powerful on-board microsequencer provides automatic conversions on the multiplexed input channels (up to 8) by controlling all channel switching, filtering and calibration.
		The microsequencer supports on-the-fly multiplexer reconfiguration, forty to fifty times faster throughput than the competition and zero step response delay during internal or external multiplexer channel changes.
	www.intersil.com /cda/deviceinfo/0,0,HI7188,0.html (412 words)

	On-chip automatic procedures for memory testing (US5675546)
		Output data from the control-read-only memory is latched in a BILBO register enhanced for use as a counter for large count.
		During the endurance test (Autocycle), the microsequencer (MC), using enhanced counter, monitors the number of on-chip controlled endurance test cycles.
		During the parametric characterization test (AutoVccMax/Min), an on-chip digital-analog converter (DAC) causes stepped changes in the supply voltage (Vcc) furnished to both the data cells (10) and the reference cells (10) of the memory.
	www.delphion.com /details?&pn=US05675546__ (435 words)

	microseq(9) - ppbus microseqencer developer's guide
		ppbus(4) for ppbus description and general info about the microsequencer.
		The microsequencer is executed either at ppbus or adapter level (see
		Most of the microsequencer is executed at ppc level to avoid ppbus to adapter function call overhead.
	www.gsp.com /cgi-bin/man.cgi?section=9&topic=microseq (1089 words)

	Control unit - TheBestLinks.com - Arithmetic and logic unit, CPU, Computer architecture, Control store, ... (Site not responding. Last check: 2007-10-22)
		Now they are often implemented as a microprogram that is stored in a control store.
		Words of the microprogram are selected by a microsequencer and the bits from those words directly control the different parts of the device, including the registers, arithmetic and logic units, instruction registers, buses, and off-chip input/output.
		In modern computers, each of these subsystems may have its own subsidiary controller, with the control unit acting as a supervisor.
	www.thebestlinks.com /Control_unit.html (202 words)

	Mentec's M11 Processor Specs (Site not responding. Last check: 2007-10-22)
		By using high performance microsequencers, ALU's and FPGA technologies to implement the PDP-11 instruction set, the M11 perfectly emulates the famous DEC J11 microprocessor.
		Microsequencer, ALU's and FPGA technologies provide up to double the performance, and greatly increase system reliability
		PDP-11 instructions are implimented by a microprogrammed subsystem based on the TI 8832 ALU and the TI 8818A microsequencer.
	www.mentec-inc.com /m11specs.htm (485 words)

	C:\BELLBOOK\P001-100\HTMFILES\CSP0167.HTM (Site not responding. Last check: 2007-10-22)
		There is a fixed overhead for microcoded control, which consists of the microsequencer and minimum micro-store.
		Very simple ISPs are best implemented directly in hardware, since their complexity does not warrant the cost overhead of a microsequencer.
		The actual breakpoint between hardwired and microprogrammed control depends on the semantic content of the ISP and the relative technology cost of the two implementation approaches.
	research.microsoft.com /~gbell/Computer_Structures_Principles_and_Examples/csp0167.htm (437 words)

	[No title]
		Since the AMS has only one glue though, the TOP SEL_ signal is likely useless, and although it has been kept for history and safety, it is always asserted.
		The TOP DV_ is the only signal that goes directely from the AMSGLUE to the AMS microsequencer.
		This task is very simple, and the logic that implements it will be omitted in the following, just to keep the description more straight.
	www-cdf.fnal.gov /upgrades/daq_trig/trigger/svt/Pisa/intdoc/SVTnotes/svt083_amsglue.txt (2346 words)

	Energy Citations Database (ECD) - Energy and Energy-Related Bibliographic Citations
		Energy Citations Database (ECD) Document #5248048 - Microsequencer architecture with firmware support for modular microprogramming
		Availability information may be found in the Availability, Publisher, Research Organization, Resource Relation and/or Author (affiliation information) fields and/or via the "Full-text Availability" link.
		Microsequencer architecture with firmware support for modular microprogramming
	www.osti.gov /energycitations/product.biblio.jsp?osti_id=5248048 (75 words)

	A Minimal TTL Processor for Architecture Exploration
		An efficient stack machine is easy to implement, and simple hardware modifications demonstrate interrupts, memory segmentation, microsequencers, parallelism, and pipelining.
		There is no dedicated microsequencer; its functions are performed by the ALU and register file.
		A 12-bit (optionally 16-bit) counter serves as a rudimentary microsequencer.
	www.zetetics.com /bj/papers/piscedu2.htm (2083 words)

	The mux/demux module operation (Site not responding. Last check: 2007-10-22)
		the microsequencer latches the RX or TX data as it is being transferred across the high speed bus into the data input
		When the microsequencer compilers processing a byte of TX or RX data, it returns to the three test loop.
		A microsequencer check used to ensure that instructions are executed in the correct order;
	www.tpub.com /content/amplifiers/TM-11-5805-784-13P/css/TM-11-5805-784-13P_239.htm (425 words)

	MULTIPLEXER/DEMULTIPLEXER MODULE (Site not responding. Last check: 2007-10-22)
		The microsequencer outputs, through the PROMs and pipeline registers, control the FST memory and data input registers.
		After the initialization phase the microsequencer enters a three test loop using the branch logic and condition
		00-03), the microsequencer next instruction location (UCNEXT 00-09), and condition select sent to the branch condition
	www.tpub.com /content/amplifiers/TM-11-5805-784-13P/css/TM-11-5805-784-13P_238.htm (541 words)

	June '95 (Site not responding. Last check: 2007-10-22)
		For more information about access and use of these programs, please contact John Cushman (744-6207) in NRC 350.
		The Recombinant DNA/Protein Resource Facility recently received the Perkin-Elmer (Applied Biosystems Division) Procise E, Model 491A, one reaction cartridge Protein Microsequencing system.
		The Facility plans to offer an automated protein/peptide sequencing service sometime thereafter.
	opbs.okstate.edu /Core/CoreNewsletter6.95.html (1235 words)

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