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| | Motorola 68010 - Wikipedia, the free encyclopedia |
 | | It is largely similar to the Motorola 68000 CPU, with the exception of the addition of several instructions for breakpoint and register control (ccr instead of sr), as well as the ability to save all of the processor state on an interrupt and exception. |
 | | This made it possible to use the processor for virtual memory applications, for which the 68000 was unsuited; specifically, contrary to the 68000, the 68010 was able to handle a double bus fault. |
 | | The 68010 could be used with the 68451 MMU, but problems with the design, in particular a 1 clock memory access penalty made this configuration unpopular and led to other vendors such as Sun Microsystems using their own MMU design. |
| en.wikipedia.org /wiki/Motorola_68010 (386 words) |
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