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Topic: Motorola 68881


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In the News (Sun 21 Jul 19)

  
  Motorola 68881 - Encyclopedia, History, Geography and Biography
The Motorola 68881 was a floating-point coprocessor chip that was utilized in some computer systems that used the 68020 or 68030 CPU.
The Motorola 68882 was an improved version of the 68881, with better pipelining, and eventually available at higher clock speeds.
Motorola claimed in some marketing literature that it executed some instructions 40% faster than a 68881 at the same clock speed, though this did not reflect typical performance at all.
www.arikah.net /encyclopedia/68881   (469 words)

  
 RT PC Advanced Processor Model 115
In this mode, communication between the 68881 and CPU takes place by reading and writing to the 68881's registers, called Coprocessor Interface Registers (CIRS) These are basically registers that you map into the CPU's address space, much like you map a PIA (6520) registers into the 6502's address space.
Another interesting feature of the 68881 is that it can be configured to work with an 8 bit data bus, with some decrease in performance as compared to its default 32 bit data bus configuration-- of course.
Additionally, the 68881 can have a separate clock attached to it, running at either a faster or slower speed than the rest of the system, due to the asynchronous nature of the chip.
www.gilanet.com /ohlandl/6152/RT-PC_Adv_Processor_115.html   (496 words)

  
 68040 Info: This new CISC microprocessor offers RISC performance Motorola has officially u   (Site not responding. Last check: 2007-10-14)
Motorola said it performed thousands of code traces using real-world applications to determine which instructions were used most often.
Motorola estimates that the cache hit rate is about 93 percent for instruction and data reads and about 94 percent for data writes.
A Processor for the 1990's It is perhaps appropriate that Motorola has introduced the 68040 in the first month of the 1990s.
www.skepticfiles.org /cowtext/comput~1/68040.htm   (1887 words)

  
 diagram of registers of motorola 68000 - motorola 68000 assembly language
It was their attempt at a home-grown RISC (now often registers of motorola 68000 referred to as a load-store) architecture, started in the 1980s.
Motorola released a series of motherboards for making "out of the box" systems based on the 88000, known as the MVME series, as well as the interesting Series 900 stackable computers.
In the late 1980s several companies were actively watching the 88000 for future use, including NeXT motorola 68000 microprocessor and Apple Computer, but both gave up by the time the 88110 was available in 1990.
www.infotechloco.com /Inf-Computer-Topics-L---M/Motorola-68000.html   (583 words)

  
 Motorola 68881 - Slider   (Site not responding. Last check: 2007-10-14)
If a 68881 were present in the system, the OS would hand it the instruction for execution.
The Motorola 68882 was an improved version of the 68881, executing some instructions 40% faster, with better pipelining, and eventually available at higher clock speeds.
When the Motorola 68040 processor was introduced, it included the FPU on board.
enc.slider.com /Enc/68881   (409 words)

  
 Preface of The Motorola Microprocessor Family
This text was written for the student in a course of study that requires a thorough knowledge of the Motorola family of microprocessors.
Because the Motorola family of microprocessors is quite diverse, this text initially concentrates on the 68000 and 68008 microprocessors.
Chapter 1 introduces the Motorola family of microprocessors with an emphasis on the 68000 and 68008.
users1.ee.net /brey/p6.htm   (1461 words)

  
 Apple Macintosh II
Introduced March 02, 1987, the Mac II featured a Motorola 68020 processor operating at 16 MHz teamed with a Motorola 68881[?] floating-point coprocessor.
A 40 megabyte internal hard disk was optional, as was a second internal 800 kilobyte 3.5-inch floppy disk drive.
The Macintosh II was followed by a series of confusingly-named modular Macs including the Macintosh IIx[?] and Macintosh IIfx, all of which used the Motorola 68030 processor.
www.ebroadcast.com.au /lookup/encyclopedia/ma/Macintosh_II.html   (154 words)

  
 Sun-3 - Wikipedia, the free encyclopedia
Sun-3 was the name given to a series of UNIX computer workstations and servers produced by Sun Microsystems, launched in 1985.
In 1989, coincident with the launch of the SPARCstation 1, Sun launched three new Sun-3 models, the 3/80, 3/470 and 3/480.
Unlike previous Sun-3s, these used a Motorola 68030 processor, 68882 floating-point unit, and the 68030's integral MMU.
en.wikipedia.org /wiki/Sun-3   (173 words)

  
 Macintosh II / Macintosh IIx Logic Board Drawing!
The updated Mac IIx ROM enabled the use of both 4MB and 16MB SIMMs in Bank A. The theoretical maximum memory installable in an upgraded Mac II with Mac IIx ROMs, or in the Mac IIx itself, is therefore 128MB, in the form of eight (8) 16MB SIMMs.
The original Mac II motherboard was based on the Motorola 68020 processor running at 15.6772MHz with an optional built-in paged memory management unit (PMMU); it also included a Motorola 68881 math coprocessor.
The Mac IIx saw the introduction of the Motorola 68030 and the 68882 coprocessor.
www.macgurus.com /products/motherboards/mbmacII.php   (494 words)

  
 The Florida Web FORUM: TECH-TALK   (Site not responding. Last check: 2007-10-14)
When you throw floating-point math at it, the CPU shucks off the responsibility to the FPU (if the computer has one), which is designed to handle floating-point math more efficiently.
Once called a numeric (or math) coprocessor, the FPU can be either a separate chip (such as Intel's 80387 or Motorola's 68881), or it can be integrated into the CPU, such as the Pentium or 68040 processors.
Just as 1994's flawed Pentiums could be induced to perform floating-point operations (by running a program to disable the FPU), your CPU can, too--but it won't do it as quickly as an FPU.
www.myflorida.com /dms/webforum/glossary/fpu.html   (110 words)

  
 [No title]
IEEE 754 allows the implementor to choose whether to mimic the narrower exponent range too when rounding to a narrower precision in a wider destination register.
The Motorola 68881, designed in 1981, chose to restrict exponent range to match precision when narrowed by precision control.
This allowed the 68881 easily to mimic less well endowed machines perfectly.
www.cs.berkeley.edu /~wkahan/CS279/X87QuestionUnderflow   (739 words)

  
 VINO 0.50 Manual - man3-3/math.3-3.txt
To use these codes with the Intel or Zilog chips, or with the Apple Macintosh or ELXSI 6400, is to forego the use of better codes provided (perhaps freely) by those companies and designed by some of the authors of the codes above.
Except for atan, cabs, cbrt, erf, erfc, hypot, j0-jn, lgamma, pow and y0-yn, the Motorola 68881 has all the functions in libm on chip, and faster and more accurate; it, Apple, the i8087, Z8070 and WE32106 all use 64 sig.
The main virtue of 4.3 BSD's libm codes is that they are intended for the public domain; they may be copied freely provided their prove- nance is always acknowledged, and provided users assist May 6, 1991 4 MATH(3) MATH(3) the authors in their researches by reporting experience with the codes.
www.eecs.harvard.edu /~vino/vino/release-0.50/man/man3-3/math.3-3.html   (2538 words)

  
 DTACK GROUNDED #8 -- April 1982   (Site not responding. Last check: 2007-10-14)
And two OTHER changes have occurred: the Motorola 68881 math coprocessor has been announced and we have developed our own fast graphics floating point package.
The Motorola 68020 32 bit processor with which the 68881 math processor acts as a coprocessor has been announced as a 16 MHz part.
The truth is, we have the option of using the 8087 with the 68000, the 68881 with the 8086 or 8088, and other combinations and permutations.
www.amigau.com /68K/dg/dg08.htm   (8381 words)

  
 2.2.3 Birth of the Hypercube
Only two years after the 64-node Caltech Cosmic Cube  was operational, there were commercial products on the market and installed at user sites.
With the next Caltech-JPL system, the Mark III, there was a switch to the Motorola family of microprocessors.
On each node the Mark III had one Motorola 68020/68881 for computation and another 68020 for communications.
www.netlib.org /utk/lsi/pcwLSI/text/node13.html   (1275 words)

  
 Christopher Hull's Resume
Proficient in C, C++, and Java, as well as various machine languages (Intel, Motorola, and DEC).
Wrote math package replacing the Macintosh's built in software, allowing application programs to automatically utilize a 68881 upgrade resulting in speed increases for math intensive products.
Assisted with hardware development of a math co-processor upgrade for the Macintosh based on the Motorola 68881.
remarque.org /~nozefngr/resume/resume.html   (1960 words)

  
 Download MultiSpec for Macintosh
- The "68K version" will run on 680x0 based Macintoshes having a Motorola 68881 or 68882 math coprocessor.
- An "68K/no math coprocessor version" (10.6.2000) is also available for 680x0 based machines which do not have a 68881 or 68882 math coprocessor such as the Mac Plus or Mac SE.
There will be no more updates to this version.
cobweb.ecn.purdue.edu /~biehl/MultiSpec/download_mac.html   (347 words)

  
 Glossary
Early versions of these devices would provide a single function, such multiply, and not surprisingly were referred as hardware multipliers (examples: the Intel 8321, TRW TDC1010).
Later true FPU's provided many different functions (examples: the Intel 8087, the Motorola 68881).
Micro Computer Units are MPU's that include RAM and ROM on a single chip.
www.antiquetech.com /glossary/glossary.htm   (1684 words)

  
 QuickBasic Incompatible with Radius, Prodigy Accelerator Board
According to unconfirmed customer reports, the Radius accelerator board reportedly does not allow QuickBasic to operate normally, and varied results may occur if a floating-point chip is present.
If you have a floating-point chip (for example, a Motorola 68881) on your accelerator board and do not use the Generate 68020 Code option in the QuickBasic compiler, a compiled QuickBasic program reportedly runs correctly.
However, if you do not have a floating-point chip on the accelerator, or if you use the Generate 68020 Code option and run on an accelerator that has a floating-point chip, the compiled QuickBasic program may return a hardware interrupt, "System Error 11."
support.microsoft.com /kb/35439   (285 words)

  
 OpenVMS documentation   (Site not responding. Last check: 2007-10-14)
Reserved to DEBUG (Motorola 68881 single precision, 32-bit)
Reserved to DEBUG (Motorola 68881 double precision, 64-bit)
Reserved to DEBUG (Motorola 68881 extended precision, 96-bit)
h71000.www7.hp.com /doc/73final/5973/5973pro_010.html   (2321 words)

  
 [No title]
Functions strtorf and strtord are now analogous to the other strtor* functions in that they now have a final pointer argument to which they write their results, and they return the int value they get from strtodg.
The xL family (g_xLfmt, strto[Irp]xL) is a variation of the old x family (for 80-bit IEEE double-extended precision) that assumes the storage layout of the Motorola 68881's double-extended format: 80 interesting bits stored in 3 unsigned 32-bit ints (with a "hole", 16 zero bits, in the word that holds the sign and exponent).
The x family now deals with 80-bit (5 unsigned 16-bit ints) rather than 96-bit arrays (3 unsigned 32-bit ints) that hold its 80-bit double-extended values.
www.netlib.org /fp/changes   (2384 words)

  
 13.1 Integrated Circuits   (Site not responding. Last check: 2007-10-14)
6830 24 1 1024x8 ROM {MCM6830A} Motorola 6840.
6850 24 1 Asyncronous Communications Interfce Adptr Motorola 68000.
1 CPU~ [2500000] Motorola 68111 48 1 8-bit MicroController {68HC11A1P}.
www.fsref.com /Fatal/FE130100.SHTML   (600 words)

  
 The Program Status Block
As well, several bits are used to indicate whether or not additional conditions, associated with the IEEE 754 standard, are trapped.
Following the Motorola 68881 coprocessor, invalid operation is divided into three, and inexact into two, cases for which trapping may be controlled separately.
Ten bits in the Program Status Block are devoted to the requirements of stateful and mutable scratchpad mode.
www.quadibloc.com /arch/ar0502.htm   (8067 words)

  
 [No title]
Purchase Price: $10,600 6151 Model 115 16,100 6150 Model 125 17,670 6150 Model B25 Planned Availability: May 1987 March 1987 (feature #3913 ASCII Terminal Cable only) RT Personal Computer and RT PC are trademarks of International Business Machines Corporation.
All new models come equipped with the new CMOS processor and memory management chips, a built-in Motorola 20 MHz 68881 floating-point unit as standard, and 4 MB of fast memory, all on the Advanced Processor Card; an Extended ESDI Magnetic Media Adapter, a single 70 MB Extended ESDI Fixed-Disk, and a 1.2 MB diskette drive.
The Model 115 brings a new level of RT PC processing power to the desk top.
www.gilanet.com /Ohlandl/6152/187-021.txt   (5836 words)

  
 Body   (Site not responding. Last check: 2007-10-14)
Ray-Tracing, Rendering, Image Processing) increase dramatically when a dedicated FPU Math Coprocessor is added to the system.
Some competitors are still using the now obsolete Motorola 68881 FPU which is much slower than the 68882.
The 68882 is twice as fast as the older, obsolete 68881 chip that is still being used on some competitors products.
www.gvp-m.com /1230iigvpm.html   (1214 words)

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