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Topic: Multiprocessor

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	Multiprocessing - Wikipedia, the free encyclopedia
		Multiprocessors may be thought as subgenre of distributed shared memory system, namely hardware one.
		Tightly coupled multiprocessor systems contain multiple CPUs that are connected at the bus level.
		Loosely coupled multiprocessor systems (often referred to as clusters) are based on multiple standalone single or dual processor commodity computers interconnected via a high speed communication system (gigabit Ethernet is common).
	en.wikipedia.org /wiki/Multiprocessor (574 words)

	The NUMAchine Multiprocessor
		Multiprocessors have existed for many years, but they have not achieved the level of success that many experts initially felt would be reached.
		In order for multiprocessor technology to reach a much greater level of commercial success than is presently held, it is crucial that system software for multiprocessors evolve considerably beyond the current state-of-the-art.
		The Stanford DASH multiprocessor [15] uses clusters of processors that share a single bus, with clusters interconnected by a mesh.
	www.eecg.toronto.edu /EECG/RESEARCH/ParallelSys/numachin.flat/numachin.html (13040 words)

	Hewlett-Packard Journal: A multiprocessor HP-UX operating system for HP 9000 computers - HP 9000 Model 870 workstation ... (Site not responding. Last check: 2007-11-06)
		Multiprocessor systems are an important technical direction for the industry because they offer the most cost-effective means of improving the performance of a given platform.
		In this multiprocessor scenario, kernel data structures are being updated simultaneously with unpredictable interleaving of updates, which inevitably leads to kernel data structure corruption.
		Because of the numerous combinations of processor speeds, bus speeds, and cache configurations that are possible in multiprocessor systems, it is a virtually impossible task to develop a multiprocessor kernel that will perform well for everybody without a significant amount of tailoring.
	www.findarticles.com /p/articles/mi_m0HPJ/is_n6_v43/ai_13075715 (1420 words)

	Multiprocessor Wakeup and Intel PIIX4
		It is essential that all processors have transitioned to the STPGNT state before it is safe to: 1) transition to a lower power state such as Sleep, or 2) externally shut off the processor clocks to allow for flushing buffers, cache maintenance, and other internal activities.
		For dual-processor and multiprocessor systems using a single STPCLK to all processors and a single SLP pin to all processors, the transition to the Sleep state should not be used.
		However, in multiprocessor systems, SLP# might be asserted to a processor that is not in Processor Sleep State 3 (that is, not yet acknowledged).
	www.microsoft.com /whdc/archive/p2x4faq1.mspx (445 words)

	Heterogeneous Multiprocessor Synthesis (HeMPS)
		The automated synthesis of heterogeneous multiprocessors (HeMP) is a relatively young field that incorporates the scheduling and allocation of tasks with the selection of processors to execute those tasks.
		The challenges to memory hierarchy design and cache parameter selection in the presence of multiple subtasks are data set size and collisions between different data sets mapping to the same areas of cache and in the case of shared instruction/data caches the overlapping of code and data.
		Multiprocessor synthesis research has until now concentrated on simple embedded computing tasks that have small data set sizes that can be allocated their own partition in the data cache.
	www.elec.uq.edu.au /~rae/HeMPS.html (615 words)

	Preemptive Multiprocessor Scheduling Anomalies - Andersson, Jonsson (ResearchIndex) (Site not responding. Last check: 2007-11-06)
		Abstract: Preemptive scheduling of periodically arriving tasks on a multiprocessor is considered.
		We show that many common multiprocessor real-time scheduling algorithms suffer from scheduling anomalies, that is, deadlines are originally met, but a decrease in execution times or an increase in periods of tasks can cause deadlines to be missed.
		We propose a partitioned multiprocessor fixed-priority scheduling algorithm with the prominent features that (i) it does not suffer from such scheduling anomalies...
	citeseer.ist.psu.edu /andersson01preemptive.html (425 words)

	Multiprocessor-Safe
		To run safely on a symmetric multiprocessor (SMP) platform, any operating system must solve this problem: how to guarantee that code executing on one processor does not simultaneously access and modify data that is being accessed and modified from another processor.
		Whether they are running on a uniprocessor or symmetric multiprocessor machine, this situation requires all kernel-mode drivers, including WDM drivers, to synchronize access to any driver-defined data or system-provided resources that are shared among driver routines and to synchronize access to the physical device, if any.
		And in a symmetric multiprocessor machine, the ISR still cannot acquire the spin lock protecting the shared data while the critical-section routine holds the spin lock and accesses the shared data at DIRQL.
	www.osronline.com /ddkx/kmarch/intro_725j.htm (681 words)

	The Stanford FLASH Multiprocessor
		The two architectural techniques for communicating data among processors in a scalable multiprocessor are message passing and distributed shared memory (DSM).
		The result is a single chip that efficiently and flexibly implements all of the functionality required in a scalable multiprocessor system.
		The Directory-Based Cache Coherence Protocol for the DASH Multiprocessor.
	www-flash.stanford.edu /architecture/papers/ISCA94/ISCA94.html (8114 words)

	Multiprocessor Operating Systems (Site not responding. Last check: 2007-11-06)
		Although all multiprocessors have the property that every CPU can address all of memory, some multiprocessors have the additional property that every memory word can be read as fast as every other memory word.
		The simplest multiprocessors are based on a single bus, as illustrated in Fig.
		Single-bus UMA multiprocessors are generally limited to no more than a few dozen CPUs and crossbar or switched multiprocessors need a lot of (expensive) hardware and are not that much bigger.
	www.informit.com /articles/article.asp?p=26027&seqNum=3 (2717 words)

	Performance Modeling of Multiprocessor Implementations of Protocols
		However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
		Two major performance bottlenecks in multiprocessor execution of protocols are contention for shared memory and for locks.
		The measured speedups for the parallel implementations relative to the sequential ones are more than 11 times for UDP (using 20 processors) and three times for TCP (using five processors) on a sequent symmetry.
	www.comsoc.org /net/private/1998/jun/262_06net03-bjorkman.html (607 words)

	The Rise and Fall of Multiprocessor Papers in ISCA
		Several researchers have anecdotally noted that the number of multiprocessor papers appears to be in decline (despite industry's continued interest in the subject).
		Multiprocessor papers have averaged 30% of the total ISCA papers.
		Multiprocessors (MP): anything to do with multiple processors and a shared-memory, message passing or some other parallel programming model.
	www.cs.wisc.edu /~markhill/mp2001.html (371 words)

	Multiprocessor Considerations for Kernel-Mode Drivers
		Therefore, every Windows driver must be designed to handle the concurrency and synchronization requirements that multiprocessor systems impose and must be thoroughly tested on both single-processor and multiprocessor systems.
		Because the Windows kernel is fully preemptible, writing drivers to run on multiprocessor systems is no different from writing drivers to run on single-processor systems.
		However, errors in synchronization and locking are more likely to occur on multiprocessor systems because code from a single driver can run simultaneously on more than one processor.
	www.microsoft.com /whdc/driver/kernel/mp_issues.mspx (188 words)

	Papers - 2nd USENIX Windows NT Symposium
		The multiprocessor market consisted of proprietary architectures that demanded a higher cost due to the scale of economics.
		An SMP architecture is a tightly coupled multiprocessor system, where processors share a single copy of the operating system (OS) and resources that often include a common bus, memory and an I/O system, see Figure 1.
		In conclusion, the advent of relatively inexpensive multiprocessor machines has placed a critical importance on the design of mainstream operating systems and their implementations of threads.
	www.usenix.org /publications/library/proceedings/usenix-nt98/full_papers/zabatta/zabatta_html/zabatta.html (5573 words)

	The Multiprocessor Simplex Demonstration
		Ideally, the Multiprocessor hardware could be used to present the Singleton Demonstration.
		Unlike some designs, the Multiprocessor Demonstration does not select the median of the outputs or require that individual systems synchronize their output.
		Similarly, the Multiprocessor Demonstration allows the use of heterogeneous hardware to be used, either for safety considerations or as partial replacements for upgrade purposes.
	www.sei.cmu.edu /activities/simplex/demonstrations/multiprocessor.html (883 words)

	Multiprocessor Systems-on-Chips
		Multiprocessor systems-on-chips are one of the key applications of VLSI technology today.
		A multiprocessor system-on-chip is more than just a rack of processors shrunk down to a single chip.
		Chip multiprocessors are components that take advantage of increased transistor densities to put more processors on a single chip, but they don't try to leverage application needs.
	www.computer.org /portal/site/computer/menuitem.5d61c1d591162e4b0ef1bd108bcd45f3/index.jsp?&pName=computer_level1_article&TheCat=1005&path=computer/homepage/0705&file=GEI.xml&xsl=article.xsl& (2758 words)

	MacOPINION : Philip Machanick \| The Multiprocessor Option (Site not responding. Last check: 2007-11-06)
		A multiprocessor system can speed up individual applications if they are multithreaded, but the easiest speedup you can get from extra processors is running multitasking more effectively.
		I have recently seen rumours that Apple is experimenting with a multiprocessor on a chip design, something that should not be too much of a surprise, since IBM already makes a dual-processor chip in the form of their high-end
		Of course, it may be true that the application of most interest to you is one that inherently cannot be multithreaded -- in which case this idea is of little interest to you.
	macopinion.com /columns/intelligence/01/04/09 (934 words)

	AppleInsider - Apple Working On Multiprocessor Power Macs (Site not responding. Last check: 2007-11-06)
		Recently, during a series of Professional Seminars held by Apple Computer, Apple employees have responded to inquiries about multiprocessor systems quite favorably.
		On more than one occasion, they have polled the audience on their level of interest in a set of multiprocessor systems from Apple.
		Obviously, a move in the direction of multiprocessor machines would be well accepted by Apple's core graphics and media market, but exactly how the units will fit into Apple's product strategy is yet to be seen.
	www.appleinsider.com /articles/9910/mystic.shtml (212 words)

	Multiprocessor Scheduling with Rejection
		Multiprocessor Scheduling with Rejection: SIAM Journal on Discrete Mathematics Vol.
		We consider a version of multiprocessor scheduling with the special feature that jobs may be rejected at a certain penalty.
		An instance of the problem is given by $m$ identical parallel machines and a set of $n$ jobs, with each job characterized by a processing time and a penalty.
	epubs.siam.org /sam-bin/dbq/article/30052 (264 words)

	DigiBarn Systems: The S-100 Multiprocessor
		This is the big one folks, very likely the largest S-100 system ever constructed, the S-100 Multiprocessor, built by Roy Murphy and colleagues at Arjay Data Processing in Scotts Valley, California, as a specialized math machine in about 1985.
		The S-100 Multiprocessor has some of the original Godbout Electronics (Compupro) boards in it, so we proceeded with a sort of restoration including adding back hundreds of boards (mostly Compupro), an original Wyse-50 monitor and Xerox 8 inch floppy drive units.
		The S-100 multiprocessor contained 8, S-100 Motorola 68000, subprocessor boards, each subprocessor unit was supported by two S-100 memory cards, an S-100 parallel/serial IO card and a bus terminator card, two subprocessor units per card cage.
	www.digibarn.com /collections/systems/s-100-multiprocessor (924 words)

	AnandTech: Multiprocessor Systems: The More the Merrier?
		This reason is that the multiprocessor standard supported by AMD and Cyrix are different that the standard supported by Intel, and as with any conflict of standards, the larger company seems to always win the race.
		So the proper way of naming a multiprocessor system, such as the one from the previous example would be to indicate the number of processors in the system, as in a Dual Pentium II 400, or a Quad Pentium II 400, etc...
		Those are the three basic requirements for a multiprocessor system, with another stipulation for a high performing multiprocessor system being the active support for multiprocessor systems in your applications.
	www.anandtech.com /showdoc.aspx?i=483&p=2 (1291 words)

	ARM Announces First Integrated Multiprocessor Core
		The MPCore™ synthesizable multiprocessor, based on the ARMv6 architecture, can be configured to contain between one and four processors delivering up to 2600 Dhrystone MIPS of performance.
		The MPCore multiprocessor implements Adaptive Shutdown™ technology and the ARM® Intelligent Energy Manager technology to reduce power consumption by up to 85 percent.
		The MPCore multiprocessor implements between one and four processors with cache coherency using a modified MESI protocol.
	www.arm.com /news/5346.html (961 words)

	PROCESSOR SCHEDULING - Uniprocessor and Multiprocessor (Site not responding. Last check: 2007-11-06)
		On a multiprocessor, multiple processors can run multiple processes at the same time.
		Affinity scheduling: schedule a process or thread onto the processor it was last using, in the expectation that all or part of its working set will still be in the cache.
		On a multiprocessor there are more processors, and so less contention for a single processor.
	www.cs.uah.edu /~weisskop/cs690_sched_smp.htm (608 words)

	Multiprocessor Operating Systems (Site not responding. Last check: 2007-11-06)
		The simplest possible way to organize a multiprocessor operating system is to statically divide memory into as many partitions as there are CPUs and give each CPU its own private memory and its own private copy of the operating system.
		For these reasons, this model is rarely used any more, although it was used in the early days of multiprocessors, when the goal was to port existing operating systems to some new multiprocessor as fast as possible.
		Thus this model is simple and workable for small multiprocessors, but for large ones it fails.
	www.informit.com /articles/article.asp?p=26027&seqNum=3 (1537 words)

	Energy-aware Synthesis of Embedded Systems on Multiprocessor Platforms (Site not responding. Last check: 2007-11-06)
		While this problem is not ``solved'' for multiprocessor applications, work is underway within a number of research groups to develop equally-mature formalisms that are applicable to multiprocessor platforms.
		However, a precise characterization of the energy savings realized by moving to a multiprocessor implementation is not known.
		These observations point to a significant need for research to be conducted on the tradeoffs that exist when designing energy-aware multiprocessor systems.
	www.cs.unc.edu /~anderson/projects/energy.html (346 words)

	Koray Oner -Publications (Site not responding. Last check: 2007-11-06)
		In multiprocessor systems, processing nodes contain a processor, some cache and a share of the system memory, and are connected through a scalable interconnect.
		RPM (Rapid Prototyping engine for Multiprocessors) is a hardware emulator for the rapid prototyping of various multiprocessor architectures.
		For cost reasons, the use of FPGAs in RPM is limited to the memory controllers, while the rest of the emulator, including the processors, memories and interconnect, is built with off-the-shelf components.
	www.usc.edu /dept/ceng/dubois/koray/koray_papers.html (828 words)

	The Performance of SCI Multiprocessor Rings (Site not responding. Last check: 2007-11-06)
		The Scalable Coherent Interface (SCI) is an IEEE standard that defines a hardware platform for scalable shared-memory multiprocessors.
		For the architecture and workload simulated, it was found that the largest efficient ring size is eight nodes and that raw network bandwidth seen by a processing element is limited at about 80Mbytes/s.
		A qualitative comparison to the DASH multiprocessor is also presented.
	www.inf.ufpr.br /~roberto/jbcs95Abstr.html (81 words)

	E-Commerce News: Developer : ARM Announces Integrated Multiprocessor Core
		The MPCore synthesizable multiprocessor, based on the company's ARMv6 architecture, can be configured to contain between one and four processors delivering up to 2,600 MIPS of performance.
		The MPCore multiprocessor implements what the company calls "adaptive shutdown" and "intelligent energy manager" technologies, which are designed to reduce power consumption by up to 85 percent, according to ARM.
		The MPCore multiprocessor is based on the ARMv6 architecture, with media extensions for next-generation, rich-multimedia devices and ARM Jazelle Java acceleration.
	www.ecommercetimes.com /story/33835.html (884 words)

	MacDevCenter.com: Multiprocessor Work Sharing with Cocoa
		With many Apple systems sporting dual processors, and rumors rife that four-processor systems are not far away, it's becoming more important that Mac programmers consider how multiprocessing can be tapped in their applications.
		Sure, the user benefits from having a multiprocessor system anyway, because the Mac OS X kernel divides the running applications amongst the available processors, but the kernel can't share the work of a single-threaded, numerically intensive application between processors.
		Now that we have a complete multiprocessor work sharing design, we can carry out some experiments to see how the different scheduling strategies work, and which is best under a given set of circumstances.
	www.macdevcenter.com /pub/a/mac/2003/05/23/multiprocessor.html (3178 words)

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