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	Two-Input DTL NOR Gate
		Both the inverter and the NAND gate use a pull-up resistor in the base circuit of the transistor, and the preceding gate must actively pull the input down to logic 0 in order to override that behavior.
		It would have been possible to construct the NOR gate by using a Diode Logic OR gate followed by a transistor inverter, just as we used a DL AND gate as the input to the DTL NAND gate.
		However, if we did that, the input circuitry for the NOR gate would have very different characteristics than the input circuitry for the NAND gate, and this might well lead to some serious complications in the design of any circuit involving both types of gates.
	www.play-hookey.com /digital/experiments/dtl_nor2.html (0 words)

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	What is logic gate? - a definition from Whatis.com - see also: OR, NOR, NOT, AND, XOR, NAND
		A logic gate is an elementary building block of a digital circuit.
		The AND gate is so named because, if 0 is called "false" and 1 is called "true," the gate acts in the same way as the logical "and" operator.
		The NOR gate is a combination OR gate followed by an inverter.
	whatis.techtarget.com /definition/0,,sid9_gci213512,00.html (0 words)

	Electronic Component Datasheets and Data Books
		4000B (GEN) (Military Cross Reference) NOR GATE, DUAL 3...
		4001B (GEN) (Military Cross Reference) NOR GATE, QUAD 2...
		4001BN (GEN) (Military Cross Reference) NOR GATE, QUAD 2...
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	Self dc-bias high frequency logic gate, high frequency nand gate and high frequency nor gate patent invention
		The gate of the fourth transistor is electrically coupled to the second terminal of the third capacitor, the source of the fourth transistor is grounded, and the drain of the fourth transistor is electrically coupled to the source of the second transistor.
		The gate of the third transistor is electrically coupled to the second terminal of the fourth capacitor, the source of the third transistor is electrically coupled to the voltage source, and the drain of the third transistor is electrically coupled to the source of the first transistor.
		The gate of the fourth transistor is electrically coupled to the second terminal of the third capacitor, the source of the fourth transistor is electrically coupled to the voltage source, and the drain of the fourth transistor is electrically coupled to the source of the second transistor.
	www.freshpatents.com /Self-dc-bias-high-frequency-logic-gate-high-frequency-nand-gate-and-high-frequency-nor-gate-dt20060907ptan20060197557.php (2526 words)

	The nor gate
		As you might expect, the NOR gate is an OR gate with an inverter on the output.
		The Boolean expression for the output of this NOR gate is f = K + L. The expression is spoken, "K OR L quantity NOT."
		The logic level inputs and corresponding outputs for a NOR gate are shown in figure 2-16.
	www.tpub.com /neets/book13/54e.htm (339 words)

	Red Gate Encyclopedia Articles @ AlienArtifacts.com (Alien Artifacts) (Site not responding. Last check: )
		The Red Gates in Moscow used to be a rare example of a triumphal arch built to an exuberantly baroque design.
		The original gate, thought to be the first triumphal arch in Russia, was built in wood on behest of Peter the Great to commemorate his victory at Poltava in 1709.
		Some decorative elements of the gate, such as the statue of angel, are exhibited in the Moscow City Museum.
	www.alienartifacts.com /encyclopedia/Red_Gate (504 words)

	NOR Gate (Site not responding. Last check: )
		The output is high only when neither A nor B is high.
		The NOR gate and the NAND gate can be said to be universal gates since combinations of them can be used to accomplish any of the basic operations and can thus produce an inverter, an OR gate or an AND gate.
		The NOR gate is called a universal gate because combinations of it can be used to accomplish all the basic functions.
	hyperphysics.phy-astr.gsu.edu /hbase/electronic/nor.html (104 words)

	Multiple-input gates : LOGIC GATES (Site not responding. Last check: )
		NOR gates, like all the other multiple-input gates seen thus far, can be manufactured with more than two inputs.
		In this circuit, the final AND gate acts as a buffer for the output of the OR gate whenever the NAND gate's output is high, which it is for the first three input state combinations (00, 01, and 10).
		It is equivalent to an Exclusive-OR gate with an inverted output.
	www.allaboutcircuits.com /vol_4/chpt_3/4.html (1366 words)

	Logic Gates
		Gates are identified by their function: NOT, AND, NAND, OR, NOR, EX-OR and EX-NOR.
		This is an OR gate with the output inverted, as shown by the 'o' on the output.
		This is an EX-OR gate with the output inverted, as shown by the 'o' on the output.
	www.kpsec.freeuk.com /gates.htm (1422 words)

	NOR Gate Flip Flop - Flip Flop - Science Lobby
		When the SET input of gate 2 is momentarily pulsed HIGH, the output of gate 2 goes LOW.
		This means that both inputs of gate 1 are LOW, so its output is HIGH, which is coupled to an input of gate 2.
		The gates are now in the state shown in diagram B. We say that the circuit has remembered or LATCHED and is in the SET state.
	www.sciencelobby.com /flip-flop/nor-gate-flip-flop.html (296 words)

	Logic gate Summary
		In most logic gates, the 0 or FALSE state is symbolized by a voltage level of approximately 0 volts while the 1 or TRUE state is symbolized by a voltage level of approximately five volts (+5 V).
		Logic gate inputs or outputs represent one bit of information in one of two states, usually thought of as a 1 for "on," "yes," or "true," and a 0 for "off," "no," or "false." Individual gates are connected in large numbers to produce the sophisticated computing power available to computers owners today.
		In practice, the output of one gate can only drive a finite number of inputs to other gates, a number called the 'fanout limit', but this limit is rarely reached in the newer CMOS logic circuits, as compared to TTL circuits.
	www.bookrags.com /Logic_gate (4006 words)

	Lessons In Electric Circuits -- Volume VI (Experiments) - Chapter 7
		In the breadboard illustration, I've shown the circuit built using the lower-left NAND gate: pin #'s 1 and 2 are the inputs, and pin #3 is the output.
		Although this circuit uses NAND gates instead of NOR gates, its behavior is identical to that of the NOR gate S-R latch (a "high" Set input drives Q "high," and a "high" Reset input drives Q-not "high"), except for the presence of a third input: the Enable.
		Normally, when using a NOR gate as an inverter, one input would be grounded while the other acts as the inverter input, to minimize input capacitance and increase speed.
	www.ibiblio.org /obp/electricCircuits/Exper/EXP_7.html (7430 words)

	NOR gate S-R latch : DIGITAL INTEGRATED CIRCUITS (Site not responding. Last check: )
		If one of the gates reaches its "high" output state before the other, that "high" state will be fed back to the other gate's input to force its output "low," and the race is won by the faster gate.
		Imagine a scenario, for instance, where one of the two NOR gates was exceptionally slow-acting, due to a defect in the chip.
		All logic gates have permissible "high" and "low" input signal voltage ranges, and if the voltage of a digital signal falls outside this permissible range, it might not be properly interpreted by the receiving gate.
	www.allaboutcircuits.com /vol_6/chpt_7/3.html (1224 words)

	Gates of Creation // Basic Hardware // Advanced Gates
		The output of the AND gate is then inverted by the OR gate to achieve the result of the whole NAND gate.
		The NOR gate is the exact opposite of the OR gate.
		As you can see, the NOR gate is the same as the NAND gate except it uses an OR gate in place of the AND gate.
	library.thinkquest.org /C0116405/Basics/advancedgates.php (630 words)

	Logic Gates
		The standard logic symbol for the inverter and a Venn diagram illustrating the relationship between the variables and the logic gate operation, are shown in Figure 1-1 and Figure 1-2, respectively.
		The NOR gate, which is composed of two or more inputs and a single output, also has a universal property.
		The term NOR is formed by the concatenation NOT-OR and implies an OR function with an inverted output.
	scitec.uwichill.edu.bb /cmp/online/P10F/logic_gates2.htm (643 words)

	Fast pulse powered nor decode apparatus for semiconductor devices patent invention
		As is shown, the gate inputs A and B are coupled to a respective pair of series PFET transistors, as well as a pair of parallel NFET transistors.
		A pull up device of the pseudo-NMOS NOR stage is configured to precharge the replica node to a logic high voltage prior to an evaluation of said NOR stage while the pass device isolates the replica node from the output node of said NOR stage.
		The negative pulse is also fed to an inverter stage for generating a positive clock pulse that in turn activates an NFET pass transistor between the NOR output and a replica node of the NOR output, and deactivates the PFET precharge device for the replica node that forms the logical input to the AND gate.
	www.freshpatents.com /Fast-pulse-powered-nor-decode-apparatus-for-semiconductor-devices-dt20060810ptan20060176081.php (1841 words)

	FEEE - Fundamentals of Electrical Engineering and Electronics: Gate universality
		Being that it is quite easy to employ NAND and NOR gates to perform the inverter (NOT) function, it stands to reason that two such stages of gates will result in a buffer function, where the output is the same logical state as the input.
		The NAND gate, on the other hand, requires inversion of all inputs to mimic the OR function, just as we needed to invert all inputs of a NOR gate to obtain the AND function.
		NAND and NOR gates are universal: that is, they have the ability to mimic any type of gate, if interconnected in sufficient numbers.
	www.vias.org /feee/gates_10.html (723 words)

	Basic Logic Gates
		The symbol is an OR gate with a small circle on the output.
		The symbol is an EXOR gate with a small circle on the output.
		The NAND and NOR gates are called universal functions since with either one the AND and OR functions and NOT can be generated.
	www.ee.surrey.ac.uk /Projects/Labview/gatesfunc/index.html (718 words)

	PLTW - TTL NOR Gate (Site not responding. Last check: )
		The NOR gate is an improved logic element used for implementing decision-making logic functions.
		The term NOR is a contraction for the expression NOT-OR.
		The NOR gate combines the functions of the NOT and OR gates.
	home.comcast.net /~teachcte/electron/ttlnor.htm (88 words)

	Lessons In Electric Circuits -- Volume IV (Digital) - Chapter 3
		Logic gate circuits are designed to input and output only two types of signals: "high" (1) and "low" (0), as represented by a variable voltage: full power supply voltage for a "high" state and zero voltage for a "low" state.
		For TTL gates, the low-level noise margin is the difference between 0.8 volts and 0.5 volts (0.3 volts), while the high-level noise margin is the difference between 2.7 volts and 2 volts (0.7 volts).
		Given this mismatch, it is entirely possible for the TTL gate to output a valid "high" signal (valid, that is, according to the standards for TTL) that lies within the "uncertain" range for the CMOS input, and may be (falsely) interpreted as a "low" by the receiving gate.
	www.ibiblio.org /obp/electricCircuits/Digital/DIGI_3.html (11412 words)

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	More Digital Logic Gates
		gate will show you that an input of 0 0 results in an output of 1, and an input of 1 1 results in an output of 0.
		This gate computes the "odd" function; the output is true if the number of true inputs is odd.
		Only when it is time to design the physical layout of an integrated circuit do engineers apply the principle of circuit equivalence to convert the gates in the logic diagram to the gates required by the particular fabrication process to be used.
	www.spsu.edu /cs/faculty/bbrown/web_lectures/gates (798 words)

	[No title]
		The NOR gate is an OR gate with a NOT gate at its end.
		Thus, for the same combination of inputs, the output of a NOR gate will be opposite that of an OR gate.
		With a NOR gate latch, the inputs are held LOW and pulsed HIGH.
	www.lycos.com /info/nor--miscellaneous.html (390 words)

	The Goldfish Online
		Just as the OR gate and NAND gates are related, so to are the AND gate and NOR gate, and as such both are featured on the one page.
		However, just as the NAND gate can also be made by NOTing the inputs of the OR gate, if the inputs of the AND gate are NOTd then you get a NOR gate.
		Using the simplified NOT gate as discussed on the NOT gate page it has been possible to simplfy, by quite a considerable amount the NOR gate.
	goldfish.ikaruga.co.uk /andnor.html (295 words)

	Digital Logic Gates Part-III
		Universal gates are the ones which can be used for implementing any gate like AND, OR and NOT, or any combination of these basic gates; NAND and NOR gates are universal gates.
		To facilitate the conversion to NAND and NOR logic, we have two new graphic symbols for these gates.
		If bubbles are introduced at AND gates output and OR gates inputs (the same for NOR gates), the above circuit becomes as shown in figure.
	www.asic-world.com /digital/gates3.html (347 words)

	What Is...a logic gate (a definition)
		A logic gate is an elementary building block of a digital circuit.
		In most logic gates, the low state is approximately zero volts (0 V), while the high state is approximately five volts positive (+5 V).
		But in practice, there is a limit to the number of gates that can be packed into a given physical space.
	cs-people.bu.edu /dbuzan/cs101/logicgat.htm (430 words)

	COROLLARY THEOREMS - ELECTRONINC DESIGN NOTES: Logic Gates
		The NAND gate is equivalent to an OR gate having negated inputs
		The NOR gate is equivalent to an AND gate having negated inputs
		The XOR Gate it is one of the most important, and it is mandatory to understand it very well.
	www.corollarytheorems.com /Design/gates.htm (516 words)

	EE101 - Lab 2
		To investigate NOT, NAND and NOR gate operation.
		Examine the output of the NAND gate when one of the inputs is left floating (not connected).
		Examine the output of the NOR gate when one of the inputs is left floating (not connected).
	www.eeng.dcu.ie /~digital1/labs/laboratory2.html (667 words)

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