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Topic: Parallel processor


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  Introduction to Parallel Programming
Processor arrays - single instruction is issued and all processors execute the same instruction, operating on different sets of data.
Problems which increase the percentage of parallel time with their size are more "scalable" than problems with a fixed percentage of parallel time.
Parallel strategy: break the loop into portions which can be executed by the processors.
www.mhpcc.edu /training/workshop/parallel_intro/MAIN.html   (4272 words)

  
  Parallel computing - Wikipedia, the free encyclopedia
Parallel computing is the simultaneous execution of the same task (split up and specially adapted) on multiple processors in order to obtain faster results.
Parallel processor machines are also divided into symmetric and asymmetric multiprocessors, depending on whether all the processors are capable of running all the operating system code and, say, accessing I/O devices or if some processors are more or less privileged.
The processors may either communicate in order to be able to cooperate in solving a problem or they may run completely independently, possibly under the control of another processor which distributes work to the others and collects results from them (a "processor farm").
en.wikipedia.org /wiki/Multi-processor   (1067 words)

  
 Binary tree parallel processor - Patent 4860201   (Site not responding. Last check: 2007-10-07)
A plurality of parallel processing elements are connected in a binary tree configuration, with each processing element except those in the highest and lowest levels being in communication with a single parent processing element as well as first and second (or left and right) child processing elements.
One such parallel processor is that in which a plurality of processors are connected in a tree-structured network, typically a binary tree.
The average processor instruction cycle time is 1.8 microseconds, producing in the case of a tree of 1023 processors a system with a raw computational throughput of approximately 570 million instructions per second, very little of which is required for communication overhead.
www.freepatentsonline.com /4860201.html   (15501 words)

  
 BDTI - Texas Instruments TMS320C8x
The fixed-point DSP processors on the TMS320C8x are called "Parallel Processors." The Parallel Processors use 64-bit instruction words and SIMD operations in the data path, which can be configured to support 8-bit, 16-bit, and, to some extent, 32-bit data.
The Parallel Processor three-input ALU is capable of executing all 256 combinations of logical operations on three variables.
The Parallel Processor supports rounding by allowing the 32-bit result of a 16-bit by 16-bit multiplication to be shifted left by up to three bits and then rounded to 16 bits.
www.bdti.com /procsum/tic80.htm   (833 words)

  
 Parallel digital processor - Patent 4901224
A parallel processor according to claim 15 wherein said program sequencer normally advances one row of said main memory during each subsequent input mode operation but can jump to other rows of said main memory in accordance with received instructions.
A parallel processor according to claim 16 wherein said program sequencer during said output mode normally returns data to the same row of said main memory as used during the prior input mode but can return data to other rows offset therefrom in accordance with received instructions.
With the system as thus far described, the parallelism in operation depends largely on the degree of parallelism in the problem being solved and is achieved at the expense of less efficient memory usage.
www.freepatentsonline.com /4901224.html   (9370 words)

  
 HITACHI SR2201 Massively Parallel Processor
Transition to parallel processing is facilitated by a flexible program development environment that includes HPF(High Performance Fortran), which enables parallel programs to be written as a natural extension to existing sequential programs, and a matrix calculation line library with parallel processing compatibility.
The SR2201 can be configured with the kind of flexibility that is only possible with a parallel computer, with a choice of processing units ranging from 32 to 2,048 (High-end model),and ranging from 8 to 64 (Compact model) that ensure that all users' computing requirements can be met.
The number of processors can be expanded from several tens to several thousand, enabling system configuration to be optimized for each task.
www.hitachi.co.jp /Prod/comp/hpc/eng/sr1.html   (670 words)

  
 Linux Parallel Processing HOWTO
By having each processor output a datum as a side-effect of reaching a barrier, it is possible to have the communication hardware return a value to each processor which is an arbitrary function of the values collected from all processors.
Both of these models allow processors to communicate by loads and stores from/into shared memory; the distinction comes in the fact that shared everything places all data structures in shared memory, while shared something requires the user to explicitly indicate which data structures are potentially shared and which are private to a single processor.
The PAPERS (Purdue's Adapter for Parallel Execution and Rapid Synchronization) project, http://garage.ecn.purdue.edu/~papers/, at the Purdue University School of Electrical and Computer Engineering is building scalable, low-latency, aggregate function communication hardware and software that allows a parallel supercomputer to be built using unmodified PCs/workstations as nodes.
www.ibiblio.org /pub/Linux/docs/HOWTO/other-formats/html_single/Parallel-Processing-HOWTO.html   (17276 words)

  
 Avalanche Scalable Parallel Processor Project
The goal of the Avalanche project is to enable the construction of usable and truly scalable parallel computing platforms that are not exorbitantly expensive, yet are still capable of achieving peta-op performance levels.
Low communication latency is the key to achieving performance scalability for both of the common parallel computation models, namely Message Passing and Distributed Shared Memory.
Toward this end, we are developing a memory architecture that tightly integrates the processor, the entire memory hierarchy, and the interconnect fabric.
www.cs.utah.edu /avalanche   (242 words)

  
 Parallel Lines
The EEMBC has just published its lastest processor benchmark scores which are its first to demonstrate detailed performance and energy tradeoffs using the EnergyBench power/energy metric on a microcontroller.
These devices use a massively parallel processor architecture couple with a database which is used for switching and routing in packet processing applications in the IP networks which keep the web running.
Multi-core processors may be the new rock n roll for the likes of Intel, AMD and Texas Instruments, but what they are saying about the potential of parallel processing architectures is not really new.
www.electronicsweekly.com /blogs/parallel-processors   (1793 words)

  
 Parallel associative processor system (EP0485690B1)   (Site not responding. Last check: 2007-10-07)
Multiprocessor parallel computing systems and a byte serial SIMD processor parallel architecture is used for parallel array processing with a simplified architecture adaptable to chip implementation in an air cooled environment.
Pickets, having a bit parallel processing element, with local memory coupled to the processing element for the parallel processing of information in an associative way where each picket is adapted to perform one element of the associative process.
The set associative parallel processing system on a single chip permits a smaller set of `data' out of a larger set to be brought out of memory where an associative operation can be performed on it.
www.delphion.com /details?pn=EP00485690B1   (485 words)

  
 The History of the Development of Parallel Computing
The machine is a fat-tree of SPARC processors, each of which is coupled to a SPARC-like network interface chip and a Fujitsu microVP vector processor.
The processor is used as a component in MIT's Alewife multiprocessor.
Each processor is a vector supercomputer with 256 Mbyte memory and a peak performance of 1.6 GFLOPS; processors are connected by crossbar network, and deliver aggregate LINPACK performance of 124.5 GFLOPS on 31920x31920 matrix.
ei.cs.vt.edu /~history/Parallel.html   (8803 words)

  
 MINIMUM PARALLEL PROCESSOR TOTAL FLOW TIME
Set T of tasks, number m of identical processors, for each task
and for each processor i, if S(u,i) is the set of tasks t for which
Variation in which all speed factors are 1 and the load is measured using the
www.nada.kth.se /~viggo/wwwcompendium/node186.html   (104 words)

  
 The Massively Parallel Processor - The MIT Press
The development of parallel processing, with the attendant technology of advanced software engineering, VLSI circuits, and artificial intelligence, now allows high-performance computer systems to reach the speeds necessary to meet the challenge of future complex scientific and commercial applications.
This system with its massively parallel hardware and advanced software is on the cutting edge of parallel processing research, making possible AI, database, and image processing applications that were once thought to be inconceivable.
The massively parallel processor represents the first step toward the large-scale parallelism needed in the computers of tomorrow.
mitpress.mit.edu /catalog/item?tid=10440&ttype=2   (187 words)

  
 Parallel Processor Scheduling
Automatic, runtime selection of processor allocations is important because many parallel applications exhibit peak speedups at allocations that are data or time dependent.
We consider the use of runtime measured workload characteristics in parallel processor scheduling.
In contrast, we propose and evaluate experimentally dynamic processor allocation policies that rely on determining job characteristics at runtime; in particular, we focus on measuring and using job efficiency and speedup.
www.cs.rutgers.edu /~tdnguyen/pubs/pps.abstract.html   (896 words)

  
 Parallel Processing HOWTO   (Site not responding. Last check: 2007-10-07)
Parallel Processing refers to the concept of speeding-up the execution of a program by dividing the program into multiple fragments that can execute simultaneously, each on its own processor.
parallel processing is not dead, but is moving in some new directions.
The fourth alternative is SIMD parallelism within a register, which is facilitated by the MMX, 3DNow!, and SSE instructions.
www.aggregate.org /PPLINUX   (461 words)

  
 Geek.com Geek News - Mitrionics receives funding for super-parallel soft processor   (Site not responding. Last check: 2007-10-07)
This malleability is the basis of the Mitrion processor, which modifies the FPGA logic in order to most efficiently process the task.
Instead, these Mitrion processors will be used in supercomputers made by SGI and perhaps other supercomputer manufacturers.
The first Mitrion processor toolkit will be released later this year, but it is unclear how long it will take to see a Mitrion-based supercomputer in the Top500 supercomputers list.
www.geek.com /news/geeknews/2005May/bch20050519030550.htm   (455 words)

  
 Parallel processor for consumer media devices: News from Opal Group
The company's architectural approach combines the implementation simplicity, high performance and immense scalability of the SIMD (single instruction operating on multiple data) computational model, with the natural manner of associative processing to manipulate data in a variety of abstract ways.
This combination of processor technology delivers the performance that developers need to implement the mathematical functions for standards implementation, while retaining the flexibility to customise digital media services.
The ASProCore is a programmable, homogeneous and fault-tolerant SIMD parallel processor core incorporating a string of identical processing units, a reconfigurable intercommunication network, and a vector data buffer for fully-overlapped data input-output.
www.electronicstalk.com /news/opa/opa100.html   (621 words)

  
 SurfWax: News, Reviews and Articles On Parallel Processor
A crane will be used tomorrow morning to hoist into place new components for Niwa's Cray T3E-1200E Massively Parallel Processor supercomputer, which was the fastest in the southern hemisphere when it was installed in June 1999.
Media processors have struggled to gain wide acceptance, but their allure still proves too hard for some chipmakers to resist.
J9 developers and engineers are currently testing the Scale Parallel Processor (SPP), a multi-million dollar super computer, which the command will use to help combatant commanders experiment and train in urban operations by creating a realistic simulation of the environments in which they conduct future operations.
news.surfwax.com /tech/files/Parallel_Processor.html   (663 words)

  
 " Hitachi Announces MP5600 Large-Scale Parallel Processor   (Site not responding. Last check: 2007-10-07)
The extensive use of CMOS technology combined with powerful parallel processing functions enables the MP5600 to deliver excellent cost- performance in a highly compact system package.
The MP5600 is positioned between the MP5800 released in April 1995 and MP5400 released in September 1995, completing the lineup of M Parallel Series systems.
Extensive use is made of the latest CMOS devices and technology throughout the MP5600, with the aim of achieving a high level of performance in a system that is highly compact, uses less energy, provides excellent cost-performance and can be readily expanded.
www.hitachi.com /New/cnews/E/1996/960415A.html   (233 words)

  
 Beefy parallel processor packs 128 cores
David Salisbury, business development director at Pact, said that the processor architecture could be tuned to address a variety of disciplines but that he expects to seek partners in broadband, networking, 3G and 4G wireless communications, speaker-independent voice recognition and encryption.
Salisbury said the XPP can, in theory, be set up to transfer data between any two processors in an array, using a system of virtual communications channels based on the passage of packets between processors.
Although the 32-bit processor at each processing node is proprietary, it is a full-featured device with an instruction set running to about 70 instructions.
www.us.design-reuse.com /news/news1193.html   (1329 words)

  
 The AIS-5000 Parallel Processor
The AIS-5000 is a commercially available massively parallel processor which was designed to operate in an industrial environment.
It has fine-grained parallelism with up to 1024 processing elements arranged in a single-instruction multiple-data (SIMD) architecture.
Various components of the system are discussed, including details of the processing elements, data I/O (input/output) pathways and parallel memory organization.
csdl2.computer.org /persagen/DLAbsToc.jsp?resourcePath=/dl/trans/tp/&toc=comp/trans/tp/1988/03/i3toc.xml&DOI=10.1109/34.3897   (465 words)

  
 Citations: Design of a massively parallel processor - Batcher (ResearchIndex)
and the J Machine from MIT [60] The performance of a parallel computer is largely dependent on the performance of its communication network, making the development of efiicient routing algorithms critical, see [33] for an example of such an algorithm.
Figure 3.3 details the structure of an array processor similar to the ILLIAC IV [66] Figure 3.4 details the data flow diagram for a SIMD implementation of the RC6 en cryption flow previously described in Figure 3.1.
The aspects of this machine that are important for our purposes are: integrated controller The parallel portion of the machine consists of a fully programmable controller and an array of processing elements.
citeseer.ist.psu.edu /context/40653/0   (2924 words)

  
 NEC Unveils Industry's First Mobile Phone Application Processor with Parallel Processing Capabilities
The new product leverages NEC Electronics' parallel processing and low power consumption technologies, enabling high performance multimedia processing such as terrestrial digital broadcast reception, videophone, and music playback while maintaining low power consumption.
"Parallel processing technology is a key to enabling enhancement of future applications, especially those that require both high performance and low power consumption," stated Yoshiharu Tamura, General Manager, Mobile Terminal Unit, NEC Corporation.
The MP211 application processor solves this dilemma by simultaneously providing higher performance and lower power consumption, and will be an integral part of NEC Electronics' lineup of solutions for the mobile phone space.
www.physorg.com /news1344.html   (667 words)

  
 ChiefDelphi Forums - Parallel Processor
Using a second processor on the robot and having it talk with the main Robot Controller isn't the hardest thing in the world but it's not trivial either.
It's a pretty simple processor to design a circuit for and all the tools you need to program it are available for free.
With the current FIRST processor, the response to a touch sensors feedback is 30ms.
www.chiefdelphi.com /forums/showthread.php?t=30896   (1914 words)

  
 Citations: The Monarch Parallel Processor Hardware Design - Rettberg, Crowther, Carvey, Tomlison (ResearchIndex)
The main problem with multistage networks is the high latency that they introduce every memory access must traverse a number of stages that is logarithmic in the number of processors.
Third, by introducing the possibility of overriding the thresholds in emergency load situations, it improves the average processor utilization rate.
for examples) Each processor in such machines has fast access to its local memory which is part of the common address space but has much slower access to any remote memory (which is the local memory of another processor) Further, each processor has a private cache whose access is even faster.
citeseer.ist.psu.edu /context/106828/0   (2764 words)

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