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| | Automatic phase detector for digital communications |
 | | Therefore, phase discontinuities are removed, and the PLL output is a continuous phase signal of frequency 2f |
 | | Incorrect phase references increase errors and, consequently, the number and the frequency of pulses in the parity error (PE) pin in the UART. |
 | | These outputs select, through the multiplexer (4052), one of the four phase references (0°, 90°, 180°, and 270°) given by the shift register (4015), whose outputs QA through QD are shifted versions of the recovered carrier. |
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