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Topic: Programmable Logic Array

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Programmable logic device

Serial Peripheral Interface Bus

EPROM

Motorola

	Programmable logic array device with grouped logic regions and three types of conductors - Patent 5537057
		The programmable logic array device of claim 3 wherein each of said regions has a first group of terminals each of which has access to at least one said set of said first group of conductors, each of said terminals of said first group of terminals being for one of (a) input and (b) output.
		The programmable logic array device of claim 1 wherein said second group of conductors comprises a plurality of horizontal second conductors extending substantially parallel to said rows, and a plurality of vertical second conductors extending substantially parallel to said columns.
		The programmable logic array device of claim 1 wherein each region in said plurality of regions of programmable logic is a member of one of said logic subsets, each said logic subset comprising four said regions arranged in first and second rows and first and second columns.
	www.freepatentsonline.com /5537057.html (9164 words)

	United States Patent: 6,605,961 (Site not responding. Last check: 2007-10-19)
		The programmable logic array of claim 13, wherein at least one of the floating gate transistors is programmed with a minimal or no fixed charge on the floating gate over the limited range of floating gate potentials or electron energies such that the floating gate transistor is effectively removed from the array.
		The programmable logic array of claim 26, wherein at least one of the floating gate transistors is programmed with a minimal or no fixed charge on the floating gate over the limited range of floating gate potentials or electron energies such that the floating gate transistor is effectively removed from the array.
		The programmable logic array also includes a second logic plane which has a number of non-volatile memory cells arranged in rows and columns that receive the outputs of the first logic plane and that are interconnected to produce a number of logical outputs such that the programmable logic array implements a logical function.
	web.engr.oregonstate.edu /~flf/6605961.html (11876 words)

	Programmable logic array - Wikipedia, the free encyclopedia
		A programmable logic array (PLA) is a programmable device used to implement combinational logic circuits.
		Programmable Logic Arrays should correspond to a state diagram for the system.
		Note that the use of the word "Programmable" does not indicate that all PLAs are field-programmable; in fact many are mask-programmed during manufacture in the same manner as a ROM.
	en.wikipedia.org /wiki/Programmable_logic_array (207 words)

	Programmable logic device with multiplexer-based programmable interconnections - United States Patent 5,376,844
		programmable function control element means for controlling each programmable logic connector to select at least one of the first conductors connected to that programmable logic connector as a source for a signal applied to the logic module input connected to that programmable logic connector.
		programmable function control element means for controlling each programmable logic connector to select at least one of the second conductors connected to that programmable logic connector as a source for a signal applied to the logic module input connected to that programmable logic connector.
		Grouping programmable logic elements 20 into mutually exclusive LAB groups, each with associated short horizontal conductors 40 for transferring data among the programmable logic elements in that group, not only helps to improve the organization of the circuit (thereby simplifying programming), but also greatly reduces the number of long conductors (e.g., 42) that are needed.
	xrint.com /patents/us/5376844 (4916 words)

	Programmable logic array with test capability in the unprogrammed state - United States Patent 4,525,714
		programmable selective logic means, operatively connected to said programmable sum array means to receive said plurality of sum terms, for outputting each of the plurality of sum terms in a normal state or in an inverted state.
		Because the pulldown logic 7 forces the complement output 12' and 14' to a logic 1 all four outputs 11' through 14' of pulldown logic 7 are all at logic 1.
		In the preferred embodiment, a logic 0 is 0 volts and a logic 1 is -0.5 volts or -500 millivolts (-0.5 V or -500 MV).
	xrint.com /patents/us/4525714 (3086 words)

	Modeling a Programmable Logic Array - Summer 1996
		The programmable logic array is used to model a variety of logic devices.
		The programmable logic array may be used in conjunction with other logic gates to model commercial programmable logic devices such as the PAL series from National Semiconductor.
		The programmable logic array is the core of the PAL16C1.
	www.spectrum-soft.com /news/summer96/pld.shtm (1390 words)

	ANSDIT - The letter "P" (Site not responding. Last check: 2007-10-19)
		An integrated logic circuit including a programmable input gate array of AND gates and a nonprogrammable output gate array of INCLUSIVE-OR gates.
		Programmable array logic circuits have many of the capabilities of field-programmable logic arrays but are simpler to program by a PROM programmer.
		An integrated logic circuit including an input gate array of AND gates and an output gate array of INCLUSIVE-OR gates, the connections between gates being realized in such a way as to perform any required switching function.
	www.ncits.org /tc_home/k5htm/p3.htm (2571 words)

	Microword generation mechanism utilizing a separate programmable logic array for first microwords - Patent 4931989
		A first of these programmable logic arrays is responsive to an operation determining portion of each processor instruction to be executed for providing the first microword needed in the execution of each such instruction.
		The additional programmable logic arrays are responsive to other operation determining portions of each of the processor instructions and provide the remainder of the microwords needed to execute each such instruction.
		The PLA output strobes from the A decoder 69 are identified as S1,SA and SB and are individually supplied to the respective ones of PLA output buffers 76,77 and 78.
	www.freepatentsonline.com /4931989.html (7507 words)

	Programmable Array Logic - Wikipedia, the free encyclopedia
		Each PAL device was "one-time programmable" (OTP), meaning that it could not be updated and reused after its initial programming.
		PAL devices have arrays of transistor cells arranged in a "fixed-OR, programmable-AND" plane used to implement "sum-of-products" binary logic equations for each of the outputs in terms of the inputs and either synchronous or asynchronous feedback from the outputs.
		Larger-scale programmable logic devices were introduced by Atmel, Lattice Semiconductor, and others.
	en.wikipedia.org /wiki/Programmable_array_logic (1324 words)

	Programmable logic array integrated circuit architectures (US6366121)
		A programmable logic array integrated circuit device has a plurality of regions of programmable logic disposed on the device in a two-dimensional array of intersecting rows and columns of regions.
		Logic regions may be used to directly drive specific input/output cells, thereby simplifying signal routing to the I/O cells and also possibly simplifying the structure of the I/O cells (e.g., by allowing certain I/O cell functions to be performed in the associated logic region).
		Programmable logic device having multiplexers and demultiplexers randomly connected to global conductors for interconnections between logic elements
	www.delphion.com /details?pn10=US06366121 (859 words)

	C:\BELLBO~1\COMPUT~1\HTMFILES\00000067.HTM (Site not responding. Last check: 2007-10-19)
		Both programmable read-only memories and masked read-only memories are commonly used, but trivial, forms of the truly universal arrays, because they can be used in a table lookup fashion to create several functions of a number of input variables.
		The progammable logic array (PLA) is a combinational circuit which remedies the disadvantages of the read-only memory implementation of combinational functions by allowing the use of product terms rather than completely decoding the input variables.
		The first programmable logic arrays had propagation times of the order of 150 nanoseconds and were thus suitable building blocks for slow, low-cost computers.
	research.microsoft.com /~gbell/Computer_Engineering/00000067.htm (576 words)

	A Tour of PLDs (Site not responding. Last check: 2007-10-19)
		A programmable logic array is normally composed of a specific number of input lines connected through a fixed or programmable array to a set of AND gates, which are in turn connected to a fixed or programmable array of OR gates.
		Programmable inversion is provided between the PAL array and the flip-flop inputs, simplifying the use of programmable polarity.
		Programmable sequencers are hybrid devices that contain both a PAL array (used for state machine branch control) and a PROM-based microsequencer.
	www.ee.cooper.edu /courses/course_pages/past_courses/EE151/PLD1 (12084 words)

	Programmable logic arrays (PLA's)
		A programmable logic array (PLA) requires that only the minterms required for a function be implemented, and allows the implementation of several functions simultaneously.
		The PLA can be considered as a direct POS (or SOP) implementation of a set of switching functions, with a set of AND functions followed by a set of OR functions.
		Thus the PLA is an efficient device for the implementation of several functions of the same set of variables.
	web.cs.mun.ca /~paul/cs3724/material/web/notes/node10.html (273 words)

	Programmable Logic Overview - PLD, CPLD, FPGA
		But the logic blocks in an FPGA are generally nothing more than a couple of logic gates or a look-up table and a flip-flop.
		The overall process of hardware development for programmable logic is shown in Figure 3 and described in the paragraphs that follow.
		Programmable logic devices are like non-volatile memories in that there are multiple underlying technologies.
	www.netrino.com /Articles/ProgrammableLogic/index.php (3517 words)

	Introduction to Programmable Logic
		Programmable logic refers to a general class of devices which can be configured to perform a variety of logic functions.
		The structure of the device consists of a programmable AND array, the output of which is fed to an OR gate gate which drives a macrocell.
		The figure shows the OR gate which is fed from the programmable AND array, and the configuration of the macrocell for registered and non-registered functions.
	www.uwm.edu /Course/318-457/proglogic/intro_pld.htm (1929 words)

	Tutorial - Programmable Logic Device Definitions
		Programmable Logic - a logic element whose function is not restricted to a particular function.
		Gate Array - Transistors or gates are fabricated in a 2 dimensional array on a die to form the standard base of an application specific integrated circuit (ASIC).
		The connection may be made by a transistor switch (which are controlled by a programmable memory element) or by an antifuse.
	klabs.org /richcontent/Tutorial/PLD_Definitions.htm (1027 words)

	Programmable Logic
		Special logic for Data Acquisition or Trigger applications in physics experiments is developed either in ASICs or in Programmable Logic chips.
		Programmable Logic has less on chip gate resources and is inferior ins speed compared to an ASIC however up to 5 Million user gates may be at disposition to be configured into complex logic systems and certain devices reach up to 300 MHz system clock.
		Programmable logic may also contain embedded ASIC subsystems like processors, network interfaces or bus interfaces or use commercial or free IP software cores to integrate these as subsystems.
	ep-div-ed.web.cern.ch /ep-div-ed/programmable_logic.htm (839 words)

	PLA (programmable logic array)
		Logically, a PLA is a circuit that allows implementing Boolean functions in sum-of-product form.
		The typical implementation consists of input buffers for all inputs, the programmable AND-matrix followed by the programmable OR-matrix, and output buffers.
		The total-size of a PLA (excluding buffers) is calculated from twice the number of input lines plus the number of output terms times the number of product terms.
	tams-www.informatik.uni-hamburg.de /applets/hades/webdemos/42-programmable/10-pla/pla.html (477 words)

	FPGA (FIELD-PROGRAMMABLE GATE ARRAY)
		The LUT is a one-bit storage block and acts as a programmable gate.
		EPROM (erasable programmable read-only memory): Exposing the chip to ultraviolet rays can erase data and a new program can be written.
		PLAs (programmable logic array): This has a programmable AND plane and a fixed OR plane.
	www.partminer.com /glossaryhtml/fpga_field_programmable_gate_array.htm (340 words)

	Design Automation and the Programmable Logic Array Macro
		Logic functions in array form are specified in a compact notation that is automatically converted either to array personalization patterns or to conventional logic blocks for input to existing checking and testing software.
		Simulation of any logic array is performed by a single program subroutine operating on these patterns.
		In addition, the simple, regular nature of the logic array lends itself to automatic generation of the layout geometries necessary to actually build the array on a silicon chip.
	domino.research.ibm.com /tchjr/journalindex.nsf/1be2fd38b451963885256547004c00c8/c2d50c7b4ad2562585256bfa0067f8e0?OpenDocument (199 words)

	Three metal layers speed FPGA design and operation - QuickLogic's ViaLink programmable logic array - Product ...
		QuickLogic's ViaLink technology results in a programmable element that has low ON resistance and low capacitance, and therefore is fast.
		The variable grain size in a pASIC 2 logic cell allows a synthesis tool to maximize utilization on the die by using a cell for up to five independent functions, or for a single function with up to 14 inputs.
		Figure 3 shows the complete pASIC 2 logic cell, which consists of two 6-input AND gates, four 2-input AND gates, six two-to-one multiplexers and one D flip-flop with asynchronous preset and clear controls.
	www.findarticles.com /p/articles/mi_m0EKF/is_n2143_v42/ai_18879647 (964 words)

	Programmable Array Logic - TIBPAL22V10-7C - TI Product Folder
		The TIBPAL22V10-7C is a programmable array logic device featuring high speed and functional equivalency when compared to presently available devices.
		When the synchronous set product term is a logic 1, the output registers are loaded with a logic 1 on the next low-to-high clock transition.
		Since each of the ten output pins may be individually configured as inputs on either a temporary or permanent basis, functions requiring up to 21 inputs and a single output or down to 12 inputs and 10 outputs are possible.
	focus.ti.com /docs/prod/folders/print/tibpal22v10-7c.html (751 words)

	Programmable Logic Array (PLA)
		Fortunately, a PLA is quite simple to learn, and produces nice neat circuits too.
		This is how the PLA looks when we leave out the AND gates and the OR gates.
		Configurable might be a better word than programmable, but that's the name that stuck.
	www.cs.umd.edu /class/spring2003/cmsc311/Notes/Comb/pla.html (527 words)

	PLA - Programmable Logic Array
		More information about the definition of PLA may appear below:
		Every attempt has been made to provide you with the correct acronym for PLA.
		If we missed the mark, we would greatly appreciate your help by entering the correct or alternate meaning in the box below.
	www.auditmypc.com /acronym/PLA.asp (93 words)

	What is PLD? - A Word Definition From the Webopedia Computer Dictionary
		Short for programmable logic device, a generic term for an integrated circuit that can be programmed in a laboratory to perform complex functions.
		A PLD consists of arrays of AND and OR gates.
		Programmable Logic Devices (PLDs): SMC - Offers a complete range of pneumatic and electrical components, including actuators, valves, instrumentation, and vacuum and air preparation parts.
	www.webopedia.com /TERM/P/PLD.html (352 words)

	Digital Designing with Programmable Logic Devices (Site not responding. Last check: 2007-10-19)
		This is followed by a description of programmable logic circuits and the methods of using them to apply Boolean logic expressions.
		The purpose of this chapter is to lay the foundation for the applications of programmable logic devices encountered later in the text.
		Chapter 7, "ROM Implementation of Programmable Logic", moves us further up the spectrum of complexity to those applications too complex for a PAL or FPLA, yet simple enough that a microcontroller is still an extravagant solution.
	www.coe.uncc.edu /~jcarter/ddpld.html (1997 words)

	Programmable Active Memories: Reconfigurable Systems Come of Age - Vuillemin, Bertin, Roncin, Shand, Touati, Boucard ... (Site not responding. Last check: 2007-10-19)
		Abstract: Programmable Active Memories (PAM) are a novel form of universal reconfigurable hardware co-processor.
		Based on Field-Programmable Gate Array (FPGA) technology, a PAM is a virtual machine, controlled by a standard microprocessor, which can be dynamically and indefinitely reconfigured into a large number of application-specific circuits.
		14 A user programmable reconfigurable logic array (context) - Carter, Duong et al.
	citeseer.ist.psu.edu /vuillemin96programmable.html (926 words)

	Programmable logic array (US4768196)
		Built-in self-test programmable logic arrays use a deterministic test pattern generator to generate test patterns such that each cross point in an AND-plane can be evaulated sequentially.
		A programmable logic array (PLA) having built-in self-testing capability (BIST), said BIST PLA being capable of operating in a normal mode and a test mode, said BIST PLA comprising:
		"Detection of Faults in Programmable Logic Arrays", by Smith, IEEE Trans.
	www.delphion.com /details?pn10=US04768196 (494 words)

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