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| | Digital integrator for pulse-density modulation using an adder carry or an integrator overflow - Patent 5995546 |
 | | A clock (35) applies clock pulses to the latches (20, 22, 24, 30) at a frequency at least as high as the frequency at which the successive parallel digital input words are applied to the inputs (12) of the adders (14, 16, 18). |
 | | Typically, the pulse density modulation of the input digital words involves framing the words, that is, treating each, word individually to produce a set output stream of pulses of length corresponding to the number of bit values that may be represented by the input word. |
 | | The modulator includes an adder for adding and accumulating the successive digital input words, and a carry output and a latch for receiving the carry output of the adder, an output of the latch providing a pulse density modulated signal representing the input digital words. |
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