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Topic: RISC

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	RISC
		RISC is a CPU design philosophy that followed from the discovery that many of the features that were included in traditional CPU designs for speed were being ignored by the programs that were running on them.
		It was Sun's use of a RISC chip in their new machines that demonstrated that RISC's benefits were real, and their machines quickly outpaced the competition and essentially took over the entire workstation market.
		As the original RISC architectures evolved, the ones that have survived (notably the PowerPC) have acquired a variety of additional instructions, some of which are for quite elaborate operations useful for graphics.
	www.ebroadcast.com.au /lookup/encyclopedia/ri/RISC.html (2916 words)

	Deeshaa.com : RISC
		The aim of RISC is to address the problems of one such complex nonlinear system — the rural Indian economy — and to outline a solution that addresses the problem of economic growth comprehensively by accomplishing a set of interlinked transitions to a more efficient equilibrium.
		RISC achieves the urbanization of the rural population without requiring the massive and unsustainable rural-urban migration.
		RISC follows the logical trend of moving away from vertically integrated institutions to one of horizontal segmentation and specialization.
	www.deeshaa.com /risc/index.html (830 words)

	RISC International - History
		The RISC founders all implemented a socio-cultural programme in their countries.
		The purpose of RISC then was to create a forum for clients to share their experiences, methodological developments and applications.
		RISC International has implemented the first global observatory on social change focusing on the dynamics of change in values, motivation and behavioural patterns in over 30 countries worldwide.
	www.risc-int.com /ar_history.html (265 words)

	Ars Technica: RISC vs. CISC: the Post-RISC Era - Page 1 - (10/1999) (Site not responding. Last check: 2007-10-13)
		RISC was not a specific technology as much as it was a design strategy that developed in reaction to a particular school of thought in computer design.
		It fails because RISC and CISC are not so much technologies as they are design strategies--approaches to achieving a specific set of goals that were defined in relation to a particular set of problems.
		Back in 1981 when Patterson and Sequin first proposed the RISC I project (RISC I later became the foundation for Sun’s SPARC architecture), a million transistors on a single chip was a lot [1].
	arstechnica.com /cpu/4q99/risc-cisc/rvc-1.html (1404 words)

	Reduced instruction set computer - Wikipedia, the free encyclopedia
		RISC was tailor-made to take advantage of these techniques, because the core logic of a RISC CPU was considerably simpler than in CISC designs.
		UC Berkeley's RISC project started in 1980 under the direction of David Patterson, based on gaining performance through the use of pipelining and an aggressive use of registers known as register windows.
		However, despite many successes, RISC has made few inroads into the desktop PC and commodity server markets, where Intel's x86 platform remains the dominant processor architecture (Intel is facing increased competition from AMD, but even AMD's processors implement the x86 platform, or a 64-bit superset known as x86-64).
	en.wikipedia.org /wiki/RISC (4180 words)

	MacKiDo/Dojo/EPICisRISC
		In RISC you use "Superscalar" to load lots of single instructions, and the processor executes them in parallel (at the same time) -- all decoding (reordering, etc.) is done by the chip.
		Say you are loading 4 x RISC instructions at the same time, then you want to improve the processor.
		RISC does the parallelism as well -- but the compiler doesn't have to optimize (specialize) the code (as much).
	www.mackido.com /Hardware/EPICisRISC.html (1555 words)

	MacKiDo/Hardware/WhatIsRISC
		RISC is just a name we've given on a certain design philosophy (that came from a collection of techniques to make processors better.
		RISC instructions have all instructions the same size -- and everything is aligned -- but not all data sizes and instructions need the same amount of data (or instruction complexity).
		RISC started as all fixed size and perfectly aligned data -- but working with legacy data was near impossible (since it wasn't perfectly aligned) -- so they added in support for misaligned data.
	www.mackido.com /Hardware/WhatIsRISC.html (5683 words)

	RISC vs. CISC
		RISC processors only use simple instructions that can be executed within one clock cycle.
		RISC does the opposite, reducing the cycles per instruction at the cost of the number of instructions per program.
		Although RISC chips might surpass Intel's efforts in specific areas, the differences were not great enough to persuade buyers to change technologies.
	cse.stanford.edu /class/sophomore-college/projects-00/risc/risccisc (905 words)

	Advantech - ePlatform Services - ARM / XScale-based Embedded Computing Solutions (Site not responding. Last check: 2007-10-13)
		One primary benefit of RISC processors is the high performance at low power consumption at a lower cost compared with typical Pentium-level x86 processors applied to embedded applications, especially mobile applications.
		RISC is always designed for a specific application; it should be compact and proprietary.
		By making the hardware simpler, RISC architecture puts a greater burden on the software, which means it might not be good for some applications because of this simple structure.
	www.advantech.com /ePlatform/RISC/01.asp (473 words)

	RISC (Site not responding. Last check: 2007-10-13)
		RISC computers are more efficient because the microcode layer, and its associated overhead (read: performance loss) is eliminated.
		RISC keeps the instruction size constant, where CISC instruction size, on the other hand, is greatly variable.
		RISC retains only the instructions that can be overlapped and made to execute in one clock cycle or less.
	members.tripod.com /Raguraman/risc.htm (1771 words)

	IDEM - Risk Integrated System of Closure
		RISC is guidance on using a risk-based approach to clean-ups.
		RISC is a non-rule Policy Document (NPD) and has not been adopted by rule.
		RISC requires that the institutional controls be memorialized in an Environmental Restrictive Covenant (generic ERC language can be found on the LUST Web site).
	www.in.gov /idem/programs/land/risc/faq.html (3409 words)

	postrisc2
		The result is a RISC ISA with an execution core that is similar to a dataflow implementation.
		Because the RISC processor executes instructions in order the issue rate is the same as the retire rate for the instructions.
		This is one of the primary tenets of the RISC and DEC 21164 philosophy.
	www.cse.msu.edu /~enbody/postrisc/postrisc2.htm (4908 words)

	RISC - a Whatis.com definition
		RISC (reduced instruction set computer) is a microprocessor that is designed to perform a smaller number of types of computer instructions so that it can operate at a higher speed (perform more millions of instructions per second, or MIPS).
		John Cocke of IBM Research in Yorktown, New York, originated the RISC concept in 1974 by proving that about 20% of the instructions in a computer did 80% of the work.
		The term itself (RISC) is credited to David Patterson, a teacher at the University of California in Berkeley.
	whatis.techtarget.com /gDefinition/0,294236,sid3_gci214266,00.html (405 words)

	[No title] (Site not responding. Last check: 2007-10-13)
		RISC processors, first developed in the eighties, seem predestined to dominate the computer industry in the nineties and to relegate old microprocessor architectures into oblivion.
		The main difference between RISC and CISC, is that the instruction set of the first kind of processors was explicitly designed to allow the sustained execution of instructions in one cycle as average.
		RISC has also been called a "scalable architecture" because it is possible to go from one technology to another with practically the same design (from CMOS to ECL, for example).
	www.inf.fu-berlin.de /lehre/WS94/RA/RISC-9.html (12041 words)

	Emulating RISC OS under Windows - OSNews.com
		In 1988, RISC OS 2 was released for the 32-bit Archimedes range of computers, which found a large market in the education sector.
		The 1991 release of RISC OS 3 offered a sophisticated GUI environment with drag-n-drop enabled throughout, multitasking, advanced Audio capabilities (capable of playing Amiga MODs and samples) 256 colours, and some truly unique UI concepts that were way ahead of their time.
		Risc OS is a ROM-based operating system, so it 'boots' in an instant on the original hardware.
	www.osnews.com /story.php?news_id=6170 (986 words)

	RISC International - Team
		RISC is committed to drawing upon all relevant competences available within RISC.
		RISC may also mobilize external competences when necessary (local expertise, software, qualitative research/semiotic skills,…).
		Due to their multicultural backgrounds and experiences, all RISC team members are acutely sensitive to other foreign cultures.
	www.risc-int.com /ar_team.html (135 words)

	CISC Vs. RISC (Site not responding. Last check: 2007-10-13)
		The term 'RISC' (short for Reduced Instruction Set Computer) was later coined by David Patterson, a teacher at the University of California in Berkeley.
		The RISC concept was used to simplify the design of the IBM PC/XT, and was later used in the IBM RISC System/6000 and Sun Microsystems' SPARC microprocessors.
		As the world enters the 21st century the CISC Vs. RISC arguments have been swept aside by the recognition that neither terms are accurate in their description.
	www.amigau.com /aig/riscisc.html (1126 words)

	The Franklin Institute Certficates of Merit - John Cocke (Site not responding. Last check: 2007-10-13)
		Cocke's RISC concept was contrary to the established direction of increasingly complex instruction sets and machines, and was consequently at variance with the dominant ideas of that time.
		RISC was a fundamentally new concept in computer system design.
		RISC processors and RISC microprocessors are key components of many of the emerging parallel machine designs that are the vanguard of the next generation of computing.
	sln.fi.edu /tfi/exhibits/cocke.html (615 words)

	The Ultimate RISC
		In general, RISC machines are characterized by fixed format instructions and extensive use of pipelined execution, while CISC machines have variable length instructions and extensive use of microprogramming.
		A minimal implementation of the ulitmate RISC architecture requires an instruction execution unit, a memory, input-output devices, and a bus to connect these.
		The minimal ultimate RISC can only be proven to be suboptimal if a processor can be found that is better when measured along at least one axis of the design space while being no worse along any other axes.
	www.cs.uiowa.edu /~jones/arch/risc (2609 words)

	IDEM - Risk Integrated System of Closure
		RISC is a guidance manual that describes how to achieve consistent closure of contaminated soil and groundwater using existing IDEM programs.
		It is a non-rule policy document, which means that RISC does not have the full force and effect of law.
		Most importantly, RISC was created to establish cost-effective closure standards and closure options that result in negligible risk to human health and the environment.
	www.in.gov /idem/programs/land/risc/intro.html (740 words)

	Rhode Island Shoreline Coalition
		RISC is a grassroots, advocacy organization designed to represent YOU and others who are tired of watching local, regional, state and federal governments and their agencies, ignore or run roughshod over individual concerns.
		RISC leaders are your neighbors; the members are those who long to be heard.
		Summer residents will find RISC a valuable ally in protecting their interests when they are not in residence.
	www.risc-ri.org (299 words)

	RISC Architectures
		RISC was also heralded a more quantitative approach to computer architecture, whereby careful experiments preceded the hardware design and sensible performance metrics were used to judge success.
		The roots of RISC lie in three research projects: the IBM 801, the Berkeley RISC processor, and the Stanford MIPS processor.
		RISC microprocessors have been the standard-bearers of performance, so Intel has embraced ideas from RISC and followed the quantitative approach.
	www.cs.washington.edu /homes/lazowska/cra/risc.html (1434 words)

	RISC OS Open: Welcome
		RISC OS A fast and easily customised operating system for devices using ARM processor cores.
		RISC OS is a computer operating system designed in Cambridge, England by Acorn.
		RISC OS is owned by Castle Technology Ltd.
	www.riscosopen.org (144 words)

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