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Serial Digital Interface - Wikipedia, the free encyclopedia |
 | | Framing is done by detection of a special synchronization pattern, which appears on the (unscrambled) serial digital signal to be a sequence of ten ones followed by twenty zeroes (twenty ones followed by forty zeroes in HD); this bit pattern is not legal anywhere else within the data payload. |
 | | An 8-bit parallel digital interface is defined by CCIR 601, this is also obsolete (however, many clauses in the various standards accommodate the possibility of an 8-bit interface). |
 | | In SD interfaces, where there is only one datastream, the 0th sample is a Cb sample; the 1st sample a Y sample, the 2nd sample a Cr sample, and the third sample is the Y' sample; the pattern repeats from there. |
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