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| | Specification, Verification, and Synthesis of control-dominated circuits: the Esterel Technology |
 | | They are not well-suited to control parts which exhibit large FSMs and more erratic behavior. |
 | | The Esterel textual programming language and the SyncCharts hierarchical automata graphical framework offer design primitives especially tailored for such applications: sequencing, concurrency, preemption, exceptions, etc. The formalisms have well-defined mathematical semantics. |
 | | Esterel Studio is a design environment allowing the user to capture designs in Esterel or SyncCharts, simulate and animate them, formally verify them, automatically generate tests vectors for various coverage criteria, and synthesize circuits. |
| www.elis.rug.ac.be /~kdb/aces/esterel.html (478 words) |
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