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Topic: Ternary logic

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In the News (Mon 17 Jun 19)

  Ternary logic - Wikipedia, the free encyclopedia
A ternary or three-valued logic is a multi-valued logic in which there are three truth values indicating true, false and some third value, often called possible, unknown, uncertain, neither true nor false (see fuzzy logic), or paraconsistent.
Balanced ternary uses -1 for false, 1 for true and 0 for the third value.
Ternary predicate logics exist as well; these may have readings of the quantifier different from classical (binary) predicate logic, and may include alternative quantifiers as well.
en.wikipedia.org /wiki/Ternary_logic   (582 words)

 Encyclopedia: Ternary logic
Although ternary most often refers to a system in which the three digits, 0, 1 and 2, are all nonnegative integers, the adjective also lends its name to the balanced ternary system, useful for comparison logic.
Ternary is inefficient for human usage, just as binary is. Therefore, nonary (base 9, each digit is two ternary digits) or base 27 (each digit is three ternary digits) is often used, similar to how octal and hexadecimal systems are used in place of binary.
Ternary also has a unit similar to a byte, the tryte, which is six ternary digits.
www.nationmaster.com /encyclopedia/Ternary-logic   (321 words)

 The Logic of More: Ternary Logic in Ripple Adders and Scramblers.   (Site not responding. Last check: 2007-10-21)
However binary logic in a way is as artificial and alien as multi-value logic, if not more so, because of its limited capabilities compared to our natural logical capabilities.
That means 16 functions for binary logic, close to 20,000 functions for ternary logic and a whopping 4 billion functions for 4-value logic.
The purpose of this article is to find ternary expressions that will provide equivalent designs and that may affect the speed (or propagation time) and size of digital solutions in ternary logic.
home.att.net /~lablans   (1362 words)

 Ternary logic circuits with CMOS integrated circuits - Patent 4107549
The ternary NOR operator 32 comprises two pairs of complementary p-type and n-type metal oxide semiconductor transistors; namely, a first p-type element 34 and a second p-type element 36 which are connected in series, and a first n-type element 38 and a second n-type element 40 which are connected in parallel.
Therefore, when the first ternary switch of each stage of the shift register is turned on, it couples the signal from the previous stage in the shift register (or the input in the case of the first stage), and causes that signal to be stored on the input capacitance of the simple ternary inverter.
The ternary signal no matter at which level it is inserted at the input terminal, is shifted to the right by one complete stage per one complete clock cycle, and appears at the input of each stage in the same manner as it was first inserted, having been inverted twice in the preceding stage.
www.freepatentsonline.com /4107549.html   (8405 words)

 Ternary logic circuit using resonant-tunneling transistors - Patent 4956681   (Site not responding. Last check: 2007-10-21)
The logic gate outputs one of at least three states, a high state, a low state and a state approximately between the high and low states in response to a signal applied to the logic gate.
The logic circuit maintains at least three states, a high state, a low state, and a state approximately between the high and low states in the respective three resonant-tunneling transistors in response to a pulse signal applied to a base of one of the resonant-tunneling transistors.
In addition, a logic gate according to the present invention can be provided where a resonant-tunneling transistor, connected in series with a resistor, receives an input signal of the logic gate at its base for conducting a current between a collector and an emitter through a superlattice layer.
www.freepatentsonline.com /4956681.html   (3746 words)

 multi-valued logic: an introduction
The focus is on extending the notion of binary logic as the description of electronic switching between two states (in general given as '1' and '0', or 'on' and 'off' or 'true' and 'false') to multi-value logic.
the logic '1' is assumed to be identical to the arithmetical '1' and the logical '0' is assumed to be identical to the arithmetical '0'.
A ternary or 3-value logic function is one that has two inputs which can assume three states (say 0, 1 and 2) and generates one output signal that can have one of these three states.
www.multivaluelogic.com   (4397 words)

 [No title]   (Site not responding. Last check: 2007-10-21)
The logic device structures may be used in analyzing systems, such as communication network address analyzing systems, but the logic device structures may also be used as part of a micro-processor architecture.
By use of such memory logic cells or memory elements, the programming or re-programming of new logic functions into the programmable logic execution unit is performed by programming the memory elements, said programming preferably being done in one clock-cycle or one memory- write cycle.
Here, a memory logic cells may be structured so that an input bit signal is fed to a first logic element input and the complementary of the input bit signal is fed to a second logic element input, with a comparison output signal being given on the logic element output.
www.wipo.int /cgi-pct/guest/getbykey5?KEY=99/31581.990624&ELEMENT_SET=DECL   (11641 words)

 LE Consulting Home Page   (Site not responding. Last check: 2007-10-21)
In addition to the lack of familiarity the sheer number of multi-value logic functions is a limit to grasp the full scope of multi-value logic.
Ternary (or 3-value) logic has close to 20,000 possible logic functions.
It is clear that even with ternary logic (which is just one level up from binary logic) it will be difficult to get the same sense of understanding of scope as with binary logic of what different functions can do.
home.att.net /~leconsult   (1135 words)

 Development of ternary computers at Moscow State University
Ternary logic has better accordance with the Nature and human informal thinking [2].
Unfortunately, the modern researches of the multivalued (non-binary) logic are formal and are not associated with practical requests.
Ternary threshold logic elements as compared with the binary ones provide more speed and reliability, require less equipment and power.
www.computer-museum.ru /english/setun.htm   (1522 words)

 Embedded.com - Is it time to move beyond zeroes and ones?   (Site not responding. Last check: 2007-10-21)
One of those discarded ideas was to move beyond binary logic to circuits based on multi-valued logic in which the information density and processing efficiency of a circuit could theoretically be increased substantially without any further expensive "improvements" to the underlying fabrication technology.
Despite the fact that all of the theoretical work on multi-valued logic that is available, we may be faced with a situation similar to that of the missionary in an apocryphal story I heard in an undergrad class in anthropology.
One of the handicaps in ternary and multi-value logic is that mostly arithmetical examples are used to demonstrate the benefits.
www.embedded.com /showArticle.jhtml?articleID=13100886   (1867 words)

 Ternarylogic LLC
The advantage in the logic will show up as lower clock rates, fewer logic functions, smaller memory and less power consumption to achieve the same or much better performance compared to binary technology.
Binary logic may be considered to be a subset of a higher valued logic.
Logic circuits with gates and inverters in 'chained' expressions.
www.ternarylogic.com   (1299 words)

 The Shwah Language: Logic   (Site not responding. Last check: 2007-10-21)
The only natural language with trivalent logic, as far as I know, is Aymará, a relative of Quechua native to the altiplano of Bolivia (see www.aymara.org) whose trivalent logic was elucidated by Iván Guzmán de Rojas.
It's called ternary because there are three digits and each successive place represents another power of three, but instead of using the digits 0, 1, and 2 (which I would call trinary or base 3), ternary uses the digits 0 and 1 and the minus sign −, which represents −1.
In bivalent logic, this is synonymous with A∨B - A∧B.
www.shwah.net /shwah6.htm   (3642 words)

 [No title]
This result is different from binary reversible logic, where the minimum universal gate is 3*3 [19,44] (all quantum gates are reversible and reversible gates have the same number of inputs and outputs and are one-to-one mappings, k*k gate has k inputs and k outputs).
Ternary logic values of 0, 1 or 2 are represented by a set of distinguishable different states of a qudit.
Pairs of ternary qudits are capable of representing nine distinct Boolean states, 00>, 01>, 02>, 10>, 11>, 12>, 20>, 21> and 22>, as well as all possible superpositions of the states.
www.ee.pdx.edu /~mperkows/=PUBLICATIONS/PDF-2003/sendai.doc   (4707 words)

 Ternary - Wikipedia, the free encyclopedia
Ternary logic, a logic system with values true, false, and another third value
Ternary operation, an operation that takes three parameters
This is a disambiguation page: a list of articles associated with the same title.
en.wikipedia.org /wiki/Ternary   (102 words)

 Enkidu2 Meta.Communications Unlimited Main Page   (Site not responding. Last check: 2007-10-21)
Enkidu2metacommnications, metasat,tripod-logic, tripod chip, ternary metacom logic chips are registered trademarks at germany, united states of america, uk and sweden.
what is ternary logic: an introductuion into history of enc.
ternary philosophy: preprint of the proceedings of IInd symposion on ternary and multivalent logic ans philosophy
domfree.de /enkidu2   (259 words)

 Gravitational vs. Quantum Logic: Virtually Left-handed Trinary Logic   (Site not responding. Last check: 2007-10-21)
The radically binary 2-based nature of right-handed trinary logic is further manifest in the fact that the sequence of the number of U's constituting the edges of the edge-sharing triangles of U's whose hypotenuses extend to the edges of the major infinitely expanding triangle is 2, 5, 14, 41, 122,.
The writer is indebted to N. Hellerstein who in correspondence prompted by this web called attention to his newly defined "pivot" operator for a ternary logic in which the third term is intermediate between 0 and 1.
It is the exemplary instance of the right-handed ternary logic illustrated in the text.
dgleahy.com /dgl/p19.html   (760 words)

 Encyclopedia article on Ternary logic [EncycloZine]   (Site not responding. Last check: 2007-10-21)
Ternary logic is a multi-valued logic in which there are three truth values indicating true, false and unknown.
In ternary logic, the number symbols 0, 1, and 2 are usually assigned to the following truth values (or some permutation thereof):
The number of functions for a given number of variables for trinary logic can be calculated by the equation 3^{3^v}, where v represents the number of variables.
encyclozine.com /Ternary_logic   (335 words)

 The Logic of More: Ternary Logic in Ripple Adders and Scramblers.   (Site not responding. Last check: 2007-10-21)
But for different reasons it never caught on as a main stream development.
It seems more appropriate as a subject for a Science Fiction story than a valid technology solution.
But what would happen if we apply multi-value logic (supposing we could realize our multi-value circuits).
lablans.home.att.net   (1362 words)

 Ternary Logic Downloads: IPSyncLogic, Logic Squares for Pocket PCs, Brain Cell, ...
The object of Logic Squares is to determine the location of 9 colors in a 3 x 3 grid by reading and then interpreting the clues.
logic, logical, battleship, hexagonal, puzzle, educational, education, paper, pencil, hex
DomiSol is a game of logic using dominoes where you match up domino "cells" (half the full domino), either horizontally or vertically, to match all 28 domino pieces.
www.fileedge.com /get/ternary-logic   (427 words)

 Ternary logic and philosophy by meta.com international   (Site not responding. Last check: 2007-10-21)
Binary logic: there are only a few rules, we learn them in the basic scools (---> make a remark to pisa, this is a very public subject now :))
The differnce is only very small - this does not really represent a ternary systems the tird color (dark green) is only converted by extending from one-bit to two-bit system (fl is no-no, dark green no-yes and light green yes-yes).
Ternary logic is no longer "l'art pour lĀ“art" : except from philosophy there are in mofern information technologies and computing a lot of very hopeful applications :
domfree.de /enkidu2/ternarylogic.htm   (745 words)

 Realization of Regular Ternary Logic Functions   (Site not responding. Last check: 2007-10-21)
In logic simulation, we often have to evaluate logic functions in the presence of unknown inputs.
In these cases, we can produce correct values by evaluating regular ternary logic functions instead of switching functions.
This paper proposes a realization of regular ternary logic functions by using double-rail logic.
csdl.computer.org /comp/proceedings/asp-dac/1999/2329/00/23290331abs.htm   (152 words)

 EENG226b Take Home Final
In ternary logic there are "trits" instead of bits, three logical values, "-1", "0", "+1" that could be represented by -5V, 0V, and +5V respectively.
The representation of a given ternary number is still a polynomial as in binary, but now with trit weights of 1,3,9,27, etc., the powers of 3.
You'll recall that in logic circuits logical values are represented by distinguishable ranges of voltages.
www.eng.yale.edu /ee-labs/morse/courses/ee226/Take_Home_Final.htm   (813 words)

 Realization of Regular Ternary Logic Functions using Double-Rail Logic - Iguchi, Sasao, Matsuura, Iseno (ResearchIndex)   (Site not responding. Last check: 2007-10-21)
Abstract: In logic simulation, we often havetoevaluate logic functions in the presence of unknown inputs.
This implementation requires O(2 n =n) logic cells, and O(n) time to simulate an n- variable logic function.
A Method to Evaluate Logic Functions in the Presence of..
citeseer.ist.psu.edu /438115.html   (396 words)

 On the Realisation of Delay-Insensitive Asynchronous Circuits with CMOS Ternary Logic   (Site not responding. Last check: 2007-10-21)
On the Realisation of Delay-Insensitive Asynchronous Circuits with CMOS Ternary Logic
The realisation of Delay-Insensitive (DI) asynchronous circuits with a CMOS ternary logic is described in this paper.
The main advantage of ternary logic is the easy realisation of a handshake protocol that significantly reduces the communication requirement, one of the major drawback of asynchronous logic.
csdl2.computer.org /persagen/DLAbsToc.jsp?resourcePath=/dl/proceedings/&toc=comp/proceedings/async/1997/7922/00/7922toc.xml&DOI=10.1109/ASYNC.1997.587152   (202 words)

 A Useful Application of CMOS Ternary Logic to the Realization of Asynchronous Circuits   (Site not responding. Last check: 2007-10-21)
This paper shows how the application of a CMOS ternary logic is useful in the realization of Delay Insensitive (DI) asynchronous circuits.
It is shown that fully DI asynchronous circuits are obtained with a ternary handshake protocol which employs the third logic level as idle state of the asynchronous interface.
It is then discussed how general purpose delay-insensitive circuits can be designed with ternary logic elements and finally an asynchronous sequence recognition circuit is described as application of the approach.
doi.ieeecs.org /DOIResolver/resolver/10.1109/ISMVL.1997.601398   (200 words)

 A New CMOS Ternary Logic Design (ResearchIndex)   (Site not responding. Last check: 2007-10-21)
This logic uses standard technology processes and requires only an extra power supply more than binary CMOS circuits.
Using an original characterisation of CMOS multivalued dynamic gates, it is shown as the advantages obtained are better noise margins and a lower power consumption as compared to other CMOS ternary solutions.
1 A Useful Application of CMOS Ternary Logic to the Realisatio..
citeseer.ist.psu.edu /687400.html   (339 words)

 TechOnLine - Design and Characterization of a Low Power Ternary DSP   (Site not responding. Last check: 2007-10-21)
SUS-LOC enables the design of ternary logic cells and is based upon the use of enhanced and depleted MOS transistors.
Concerning the DSP, we focused on the arithmetic and memory units and studied several binary arithmetic structures like ripple carry adder, CLA and Sklansky adders in order to extend them to ternary logic.
We also show how ternary logic can reduce the power due to the interconnections.
www.techonline.com /community/member_company/member/tech_paper/5568/content_37064   (193 words)

 [No title]   (Site not responding. Last check: 2007-10-21)
The relevant algebra will be presented as it applies to this ternary logic.
The most basic logic functions needed to implement logic circuits will be identified and the circuits will be designed.
Popular arithmetic circuits such as half-adders and full-adders will be designed, both with ternary and binary logic.
bass.gmu.edu /seminars/mateo.doc   (108 words)

 Title page for ETD etd-1113102-222139   (Site not responding. Last check: 2007-10-21)
Ternary and Quaternary Logic to Binary Bit Conversion CMOS Integrated Circuit Design Using Multiple Input Floating Gate MOSFETs
Multiple-input floating gate MOSFETs and floating gate potential diagrams have been used for conversion of ternary-valued input and quaternary-valued input into corresponding binary-valued output in CMOS integrated circuit design environment.
The conversion circuit for ternary inputs into corresponding binary outputs has maximum propagation delay of 8 ns with 0.1 pF simulated capacitive load.
etd.lsu.edu /docs/available/etd-1113102-222139   (219 words)

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