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	Watchdog timer - Wikipedia, the free encyclopedia
		A watchdog timer is a computer hardware timing device that triggers a system reset if the main program, due to some fault condition, such as a hang, neglects to regularly service the watchdog (writing a 'service pulse' to it, also referred to as 'patting the dog').
		The most common use of watchdog timers is in embedded systems, where this specialized timer is often a built-in unit of a microcontroller.
		Watchdog timers may also trigger control systems to move into a safety state, such as turning off motors, high-voltage electrical outputs, and other potentially dangerous subsystems until the fault is cleared.
	en.wikipedia.org /wiki/Watchdog_timer (252 words)

	Using the Secure Microcontroller Watchdog Timer - Maxim/Dallas
		The watchdog timer uses the high precision crystal oscillator that is also used by the microcontroller.
		A watchdog timer is a simple countdown timer which is used to reset a microprocessor after a specific interval of time.
		By moving the watchdog timer inside the microcontroller, the number of devices in the system is reduced, increasing the overall system reliability.
	www.maxim-ic.com /appnotes.cfm?an_pk=101 (1543 words)

	Introduction to Watchdog Timers - software hang detection, kick, processor reset (Site not responding. Last check: 2007-11-06)
		Generally speaking, a watchdog timer is based on a counter that counts down from some initial value to zero.
		In either case, the output from the watchdog timer is tied directly to the processor's reset signal.
		The process of restarting the watchdog timer's counter is sometimes called "kicking the dog." The appropriate visual metaphor is that of a man being attacked by a vicious dog.
	www.netrino.com /Publications/Glossary/WatchdogTimer.html (1125 words)

	Watchdog Timer - Dallas Microcontroller 80C320 / DS80C320 Tutorial - Microcontroller Tutorials Resource
		When the watchdog is enabled, the software must write to a certain SFR on a regular basis to let the watchdog know that the program is still running correctly.
		In the event that the watchdog timer is not reset within the configured amount of time, the watchdog will trigger a "Watchdog Interrupt." The watchdog interrupt is a new interrupt introduced in the DS80C320.
		If the watchdog timer is allowed to run out and no action is taken to reset the timer in the Watchdog Interrupt, the watchdog will automatically reset the system.
	www.hobbyprojects.com /dallas_80C320_tutorial/watchdog.html (1226 words)

	Diagnostic system for a watchdog timer - Patent 4956842
		The watchdog timer has a circuit for disabling the circuit for shutting down the system which is controlled by the control program during testing of the watchdog timer.
		Patent No. 3,919,533 discloses a watchdog timer which periodically provides a code to a decoder network cyclically during an interval having a period shorter than a predetermined time interval of the timing network so that a fault is continuously inhibited as long as the code is continuously supplied with the desired periodicity.
		If the watchdog timer 22 detects a predetermined sequence of key words measured from a last reset pulse generated by the watchdog timer 22 within a predetermined time window, then the watchdog timer is reset which is the normal mode of operation.
	www.freepatentsonline.com /4956842.html (4879 words)

	Using the High-Speed Micro's Watchdog Timer - Maxim/Dallas
		A watchdog timer is fundamentally a time measuring device that is used in conjunction with, or as part of, a microprocessor and is capable of causing the microprocessor to be reset.
		In a typical application, the watchdog timer is configured to reset the processor after a predetermined time interval.
		For the watchdog reset to be an effective error correction mechanism, the reset state of the processor must be safe.
	korea.maxim-ic.com /appnotes.cfm?an_pk=548 (2773 words)

	Test mode programmable reset for a watchdog timer (US6260162)
		When the device is placed in a test mode by pulling a test mode hardware pin during a reset of the timer and then an appropriate write key is provided to the timer, a watchdog timer reset count is writeable, allowing for a programmable duration for a watchdog timer reset.
		The watchdog timer reset count may be a reset duration value maintained by a watchdog timer reset counter.
		watchdog timer reset write enable logic for enabling writes to a watchdog timer reset count of the watchdog timer reset control block in a test mode.
	www.delphion.com /details?pn=US06260162__ (309 words)

	avr-libc: <avr/wdt.h>: Watchdog timer handling (Site not responding. Last check: 2007-11-06)
		In order to prevent the watchdog timer configuration from being accidentally altered by a crashing application, a special timed sequence is required in order to change it.
		When the watchdog timer is enabled, a call to this instruction is required before the timer expires, otherwise a watchdog-initiated device reset will occur.
		Since the watchdog timer is based on a free-running RC oscillator, the times are approximate only and apply to a supply voltage of 5 V. At lower supply voltages, the times will increase.
	www.nongnu.org /avr-libc/user-manual/group__avr__watchdog.html (473 words)

	Watchdog Timer
		The watchdog timer is a 16 bit counter that resets the processor when it rolls over to zero.
		The watchdog timer can be configured to give an interrupt when it rolls over; this interrupt could also be used to handle system crashes.
		While the watchdog timer is not as versatile as the other MSP430 timers, the watchdog control register WDTCTL still allows selection of the timerâs divider and clock source.
	cnx.org /content/m11998/latest (337 words)

	Watchdog Timer Hardware Requirements for Windows Server 2003: Version 1.01
		The watchdog timers hardware must provide the operating system a method for setting the countdown time to a range of values from 1 second to 511 seconds, with a granularity of one second.
		If the timer is configured to be enabled and running at system boot, the watchdog timer counter must be triggered after the BIOS POST to ensure that the operating system has time to load and boot before the counter reaches zero.
		If the watchdog is in the Enabled\Stopped state and a 1 is written to bit 0, the watchdog moves to the running state but a count interval is not started until a 1 is written to bit 7.
	www.microsoft.com /whdc/system/CEC/watchdog.mspx (1525 words)

	Quanser Toolbox - Q8
		If the watchdog expires, then the analog outputs are reset to 0V and the digital outputs are reconfigured as digital inputs and pulled high.
		The Watchdog Interrupt block is an asynchronous block that is executed immediately upon expiration of the watchdog timer, independent of the sampling period of the model.
		When EXT_INT is configured as a watchdog, a falling-edge on the EXT_INT line causes all the analog outputs of the card to be reset to zero and all the digital I/O lines to be pulled high, just like a watchdog timer.
	www.quanser.com /english/html/solutions/Q8/Watchdog.html (452 words)

	C16x/ST10 Watchdog Timer Example Program
		The C program configures the watchdog timer in divide by 2 mode and sets the reload value to 128 (0x80).
		A breakpoint is set on the reset vector to output Watchdog Reset and halt execution in the event of a watchdog timer reset.
		You may open the watchdog timer dialog from the peripherals menu to view the status of the watchdog.
	www.keil.com /download/docs/198.asp (202 words)

	Introduction to Watchdog Timers
		A watchdog timer is a piece of hardware that can be used to automatically detect software anomalies and reset the processor if any occur.
		The hardware implementation of this watchdog allows the counter value to be set via a memory-mapped register.
		To prevent this, many watchdog implementations require that a complex sequence of two or more consecutive writes be used to restart the watchdog timer.
	www.embedded.com /shared/printableArticle.jhtml?articleID=9900324 (1185 words)

	Emerging Technologies
		A watchdog timer is a mechanism that is used to determine whether another mechanism is functioning properly.
		A simple utility is provided which sets the watchdog timer to reboot the PC after X seconds (where X is 0 to 2500) if not notified before the timer expires.
		The basic driver supplied with the board uses an on-board interrupt which notifies the watchdog timer once per second that the system is alive.
	www.etinc.com /watchdog.htm (565 words)

	HOWTO Watchdog Timer - Gentoo Linux Wiki
		A watchdog is a tool that is supposed to automatically reboot a computer when something goes wrong.
		The program that writes to the device is called watchdog (sys-apps/watchdog) and may also monitor other parts of your computer like if some chosen processes are running or your network interface is still receiving data.
		For the start don't activate Disable watchdog shutdown on close as this means that you cannot shutdown your software watchdog without having your computer rebooted by the kernel.
	gentoo-wiki.com /HOWTO_Watchdog_Timer (1418 words)

	Watchdog Timer (Site not responding. Last check: 2007-11-06)
		The watchdog timer is used to detect a system problem, such as software in an endless loop (Ed.
		The watchdog works by checking that the system timer 0 is being serviced regularily.
		Since no clock occured from timer 0 while timer 3's gate was active, timer 3 remains in the same state.
	www.gilanet.com /ohlandl/config/watchdog_timer.html (206 words)

	PC Watchdog, Watchdog Timer, linux, NT, XP, Kiosk, QUANCOM Watchdog Products, USB PC Watchdog
		PC-Watchdog boards controlling the PC Nowadays, a watchdog card is nearly essential if a working system and a permanent readiness has to be guaranteed.
		Watchdog cards are used for the supervision of programs that have to be permanently in operation, for example in process or production supervision, in other critical applications or in mailbox programs.
		The watchdog time is the time in which the software must send a signal to the board to prevent the relay from triggering.
	www.quancom.de /pc_watchdog.htm (773 words)

	General Purpose Watchdog Timer Component for a Multitasking System
		Contained within the watchdog manager class is a synchronous task which executes at an interval just under the service interval for the watchdog timer.
		If the system startup exceeds the service interval for the watchdog timer, the initialization logic is responsible for providing the necessary watchdog timer service until the RTOS assumes control of the processor to dispatch application tasks.
		If the service interval for the watchdog timer were 10ms, the manager task would digest 10% of the processor throughput-that's quite significant for a supporting system component.
	www.embedded.com /97/feat29704.htm (4600 words)

	Watchdog Timer
		The two-stage watchdog timer can be used by C5 applications or middleware to monitor their sanity.
		When the watchdog timer is enabled, the second stage reset-mode watchdog device is armed and is running all the time, even when the two-stage watchdog timer is unallocated and not controlled by an application.
		Because the reset mode watchdog device must not be disarmed, the system will continue to reload the reset mode device silently until it is shut down, or until the watchdog timer is explicitly allocated and armed by the HA framework (or by another application).
	www.jaluna.com /doc/c5/html/AppliDevGuide/x5260.html (576 words)

	Talk:HOWTO Watchdog Timer - Gentoo Linux Wiki
		Watchdog on my system is configured to test that syslog-ng and apache2 are running using the following two lines
		A nasty problem occurs if you set watchdog to have a run-level of boot.
		Since most of these will be operate with a run-level of default, watchdog should also have a run-level of default.
	gentoo-wiki.com /Talk:HOWTO_Watchdog_Timer (147 words)

	TDS9092 Technical Manual: Watchdog Timer
		If it crashes through power spike or otherwise the watchdog timer will reset the system and the application software will be re-entered.
		The watchdog timer is independent of the microprocessor.
		After the divider is reset by a watchdog service a time of 106ms passes and then the open drain output (similar to open collector) is pulled low.
	www.triangledigital.com /man9092/ch2watchdog.htm (457 words)

	Watchdog Timer Assumes Varied Roles - Maxim/Dallas
		The MAX6369-MAX6374 series of pin-selectable watchdog timers are designed to supervise µP activity and indicate when a system is working improperly.
		During normal operation, a µP should repeatedly toggle the WDI (watchdog input) before the selected watchdog-timeout period elapses to indicate that the system is properly executing code.
		The cited family of watchdog supervisors is available in SOT23-8 packages and has selectable watchdog-timeout periods and delays of 1.7msec to 104sec in seven steps.
	www.maxim-ic.com /appnotes.cfm/appnote_number/582 (553 words)

	Daemon News '200406' : '"Blueprint: Watchdog Timers "'
		A watchdog timer is a small bit of hardware which will reset the machine if your operating system or program fails to pay attention to it before it loses its patience.
		With a watchdog, instead we could configure the watchdog for a 15 minute timeout and reset it every time we successfully complete scanning an email for virus.
		The reason for this slightly unorthodox calling convention is that there may be multiple watchdogs in a system, and as long as one of them gets armed, we are happy with the result.
	ezine.daemonnews.org /200406/watchdog.html (1068 words)

	AVR watchdog reset timer-practical approach - Scientific, embedded, biomedical, electronics contents.
		As we mentioned earlier, watchdog timer is a distinct timer counter, which generates reset signal when it fill up.
		Watchdog timer can be enabled during flashing the chip.
		Note: before you enable watchdog timer always reset watchdog timer, because the value might be non zero left.
	www.scienceprog.com /avr-watchdog-reset-timer-practical-approach (981 words)

	Why use watchdog variable timer - Scientific, embedded, biomedical, electronics contents.
		Once Watchdog timer is triggered, timer counts up to time you set and then it resets the MCU.
		The only problem with watchdog timer is that it runs independently of the res of the system.
		It is internal it can be done in software, if watchdog timer is external, than the easiest way to do this to put a jumper that breaks the connection between watchdog timer and reset circuit.
	www.scienceprog.com /why-use-watchdog-variable-timer (830 words)

	Print Version-Supervisory IC with watchdog timer (Site not responding. Last check: 2007-11-06)
		Standard watchdogs, whether internal to the CPU or external, are dependent on the CPU hardware and software to generate a counter reset signal and therefore will not reliably prevent hardware and software errors, said the company.
		In addition, timings of the watchdog function in the EM6151 are programmable using one external resistor to set the power-on reset delay and the watchdog time.
		The ratio for the close/open watchdog window is factory programmable, as well as the reset threshold voltage using an external two-resistor voltage divider.
	www.eetasia.com /ARTP_8800376372_499489.HTM (474 words)

	FieldPoint Watchdog Timer- Developer Zone - National Instruments (Site not responding. Last check: 2007-11-06)
		The network watchdog feature enables you to guard your system against failures in the network connection, cables, or host computer, and to put the channel outputs in a user-defined state (the watchdog state) if such failures do occur.
		In either case, the watchdog does not start monitoring network activity until the network module is polled (in the case of serial connections) or a FieldPoint server subscribes to a data item (in the case of Ethernet connections).
		The watchdog timer is then reset each time the network module receives the heartbeat.
	zone.ni.com /devzone/cda/tut/p/id/3347 (831 words)

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