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Topic: XOR gate

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	Exclusive disjunction - Wikipedia, the free encyclopedia
		In view of the isomorphism between addition modulo 2 and exclusive disjunction, it is clear that XOR is both an associative and a commutative operation.
		XOR is also used to detect an overflow in the result of a signed binary arithmetic operation.
		XOR can be used to swap two numeric variables in computers, using the XOR swap algorithm; however this is regarded as more of a curiosity and not encouraged in practice.
	en.wikipedia.org /wiki/Xor (969 words)

	Logic Gates
		This is a diagram of a NOT gate.
		This is not ambiguous because the XOR function is associative (all parenthesization of this expression are equivalent).
		Although the output of a gate may be attached to more than one input, an input may not have two different outputs attached to it (this would create conflicting input signals).
	www.cs.umd.edu /class/spring2003/cmsc311/Notes/Comb/gates.html (1347 words)

	Low-power XOR gate
		XOR gate which is a key component and the main object of study in this experiment was first proposed in [1].
		The physical layout of the XOR gate is shown in Fig.
		The gate was a part of a rather densely packed layout of the correlator delay line, so the positions and orientations of the XOR junctions were dictated mostly by the positions and orientations of the neighboring junctions, not shown in the picture.
	pavel.physics.sunysb.edu /~sasha/docs/sasha/thesis/node30.html (519 words)

	Derived Logical Functions and Gates
		With the gate shown to the left, both inputs must have logic 1 signals applied to them in order for the output to be a logic 0.
		The NOR gate is an OR gate with the output inverted.
		Where the OR gate allows the output to be true (logic 1) if any one or more of its inputs are true, the NOR gate inverts this and forces the output to logic 0 when any input is true.
	www.play-hookey.com /digital/derived_gates.html (721 words)

	Logic Circuit - Example 1
		Remember that an XOR gate's output (labeled C) is set to 1 if EITHER inputs (labeled A and B) are set to 1, except when both A and B are 1.
		In conclusion, the XOR produces a 1 when exactly one of the inputs is 1, in all other case it produces a zero.
		The truth table tell us which values we expect on the output of the XOR gate for which values of the inputs A and B. For example, if A=1 and B=0, C will be 1.
	www.cs.odu.edu /~jbollen/CS149/gates/XOR.html (603 words)

	Application specific exclusive of based logic module architecture for FPGAs - Patent 5338983
		The outputs of the third NAND gate (36) and second XOR gate (30) are the output terminals (F2, F1) of the logic module (10).
		The XOR gate 22 has its output connected to the other one of the inputs of the Nand gate 28, as well as to the control input of Mux 24.
		The outputs of Nand gates 32 and 28 are connected to the inputs of a Nand gate 36.
	www.freepatentsonline.com /5338983.html (2399 words)

	CS251 - Computer Organization
		The output of the AND gate will not change and therefore the inputs to the XOR gate are also correct at time=0.
		Thus, at time=0 the input to the XOR gate is 01 because it will be another 7.5 ns before the output of the AND gate changes to a 1.
		Thus, in the mean time the XOR gate computes its output based on 01 and generates a 1 at the output after 6.5 ns.
	www.dickinson.edu /~braught/courses/cs251f02/classes/notes10.html (1370 words)

	PHY107 Other Logic Gates
		For a two-input XOR the output is similar to that from the OR gate except it is 0 when both inputs are 1.
		In general, an XOR gate gives an output value of 1 when there are an odd number of 1's on the inputs to the gate.
		In general, an XNOR gate gives an output value of 1 when there are an even number of 1's on the inputs to the gate.
	www.shef.ac.uk /physics/teaching/phy107/othergates.html (462 words)

	Binary Data Storage and Manipulation, a SNC CS225 Project (Site not responding. Last check: 2007-10-08)
		We use the near absence of voltage to represent a 0 and the presence of substantial voltage to indicate a 1.
		The XOR gate is a complex gate type, or derived gate, meaning that it is made by combining simple gates.
		A NAND (Not AND) gate is the same as an AND gate, with the exception that, in all states, the output is the opposite as it would be in the AND gate.
	www.snc.edu /compsci/cs225F04/alu/website/gates.html (620 words)

	3-7 THE XOR AND XNOR GATES
		Two other gates that are useful are the exclusive OR (XOR) and, to a lesser extent, the exclusive NOR (XNOR).
		Note that the output of the XOR gate is HI, if and only if, exactly one input is HI.
		Note that the output of the XNOR gate is just the compliment of the XOR gate and therefore the XNOR gate could also be constructed by adding a NOT gate to the output of the XOR gate.
	www.thiel.edu /digitalelectronics/chapters/ch3_html/ch3-7.htm (374 words)

	Re: What are NOR and XOR gates? what are some applications of them ?
		The inputs to a logic gate are 1's and 0's, and the output is either a 1 or a 0, depending on the inputs to the gate, and what type of gate it is.
		An XOR, or eXclusive OR, has the output of the XOR gate be "1" if Either of the two inputs are 1, but NOT BOTH inputs.
		Anytime the OR gate output would be 1, the output of a NOR gate would be 0, and if the output of an OR gate would be 0, the output of a NOR gate would be 1.
	www.madsci.org /posts/archives/dec98/913849102.Cs.r.html (358 words)

	What is logic gate? - a definition from Whatis.com - see also: OR, NOR, NOT, AND, XOR, NAND (Site not responding. Last check: 2007-10-08)
		The AND gate is so named because, if 0 is called "false" and 1 is called "true," the gate acts in the same way as the logical "and" operator.
		The NOR gate is a combination OR gate followed by an inverter.
		The XNOR (exclusive-NOR) gate is a combination XOR gate followed by an inverter.
	whatis.techtarget.com /definition/0,,sid9_gci213512,00.html (510 words)

	More Digital Logic Gates
		gate will show you that an input of 0 0 results in an output of 1, and an input of 1 1 results in an output of 0.
		This gate computes the "odd" function; the output is true if the number of true inputs is odd.
		Only when it is time to design the physical layout of an integrated circuit do engineers apply the principle of circuit equivalence to convert the gates in the logic diagram to the gates required by the particular fabrication process to be used.
	www.spsu.edu /cs/faculty/bbrown/web_lectures/gates/index.html (798 words)

	Logic Gates
		The name of the gate is its logical function that relates the inputs to the outputs.
		The output of an XOR gate is true if (1) input A is true XOR (2) input B is true, otherwise the output is false (exclusive or).
		Exclusive or, or XOR (pronounced "zor"); the output is true if A is true, or if B is true, but not if both are true.
	www.is.wayne.edu /drbowen/casw03/gates.htm (987 words)

	XOR Gates (via CobWeb/3.1 planetlab2.cs.unc.edu) (Site not responding. Last check: 2007-10-08)
		The XOR GATE is a similar to an OR gate except for the instance when all the inputs are high.
		With the XOR gate when all the inputs are high the output will be low.
		An example of the use of a XOR gate is in the half-adder circuit.
	www.hcc.hawaii.edu.cob-web.org:8888 /~richardi/113/c113_1c/1c_6/1c6.htm (131 words)

	Overview of Fault Tree Gates (Part II)
		Transfer in/out gates are used to indicate a transfer/continuation of one fault tree to another.
		In classical fault trees, the Transfer gate is generally used to signify the continuation of a tree on a separate sheet.
		For example, if there are two input events, then the XOR gate indicates that the output event occurs if only one of the input events occurs but not if zero or both of these events occur.
	www.weibull.com /hotwire/issue38/relbasics38.htm (1949 words)

	XOR gate - Wikipedia, the free encyclopedia
		The XOR gate is a digital logic gate that implements exclusive disjunction - it behaves according to the truth table to the right.
		A half adder consists of an XOR gate and an AND gate.
		XOR gates are basic logic gates, and as such they are recognised in TTL and CMOS ICs.
	en.wikipedia.org /wiki/XOR_gate (457 words)

	Howstuffworks "How Boolean Logic Works"
		The final two gates that are sometimes added to the list are the XOR and XNOR gates, also known as "exclusive or" and "exclusive nor" gates, respectively.
		The idea behind an XOR gate is, "If either A OR B is 1, but NOT both, Q is 1." The reason why XOR might not be included in a list of gates is because you can implement it easily using the original three gates listed.
		Since there is a well-understood symbol for XOR gates, it is generally easier to think of XOR as a "standard gate" and use it in the same way as AND and OR in circuit diagrams.
	computer.howstuffworks.com /boolean1.htm (551 words)

	Boolean Logic, Gates, and Computer Circuits
		An XOR gate can be constructed out of 2 AND gates, 2 NOT gates and one OR gate.
		Alternately a Half Adder can be implemented using 1 XOR gate (for the sum) and an 1 AND gate (for the carry).
		This version is implemented using two XOR gates, two AND gates and 1 OR gate.
	userpages.wittenberg.edu /bshelburne/Comp150/LogicGatesCircuits.html (2005 words)

	XOR -- from Wolfram MathWorld (via CobWeb/3.1 planetlab2.cs.unc.edu) (Site not responding. Last check: 2007-10-08)
		For multiple arguments, XOR is defined to be true if an odd number of its arguments are true, and false otherwise.
		While this means that the multiargument "XOR" can no longer be thought of as "the exclusive OR" operation, this form is rarely used in mathematical logic and so does not cause very much confusion.
		Computation of the multiargument XOR requires evaluation of all its arguments to determine the truth value, and hence there is no "lazy" special evaluation form (as there is for AND and
	mathworld.wolfram.com.cob-web.org:8888 /XOR.html (397 words)

	VLSI Design Project -- 24-Bit Code Generator [EE 563]
		The drawback of this approach over the textbook approach is that there is one XOR gate for every D Flip-Flop in the shift register, regardless of the number of taps.
		Since XOR gates were already reduced a single-gate level, we concentrated on the design of our D Flip-Flops.
		Because the XOR gate is actually composed of two halves, XOR_A and XOR_B, we will actually break this up into three pieces, so that we have the trailing half of the previous XOR, followed by the Master-Slave Flip-Flop (acting as a D Flip-Flop), followed lastly by the front half of the next XOR.
	spatula-city.org /~im14u2c/vlsi/report.html (4308 words)

	EDN -- 03.01.96 Hug an XOR gate today: an introduction to Reed-Muller logic
		Employing XOR gates in functions often facilitates circuit testing, and such implementations can also offer significant benefits by employing fewer transistors and tracks.
		You can easily recognize this truth table as that of an XOR function, so it should come as no great surprise to find that implementing the table as a single XOR gate is preferable to basing your implementation on multiple AND, OR, and NOT gates.
		Because XORs are both commutative ((a^b)=(b^a)) and associative ((a^b)^ c=a (b^c)), it doesn't matter which combinations of inputs you apply to the individual gates.
	www.edn.com /archives/1996/030196/05df4.htm (1390 words)

	Gate Level Modeling Part-I
		The gates have one scalar output and multiple scalar inputs.
		The 1st terminal in the list of gate terminals is an output and the other terminals are inputs.
		Transmission gates tran and rtran are permanently on and do not have a control line.
	www.asic-world.com /verilog/gate1.html (371 words)

	Small Scale Integrated Circuits
		These basic gates are essential to design an understanding how they are formed can help you understand how to build larger and more complex Boolean networks.
		The gates shown here are -- and, or, nand, nor, xor, and not.
		The symbols located to the right of the tables are the symbols used when drawing a circuit using these gates.
	home.cfl.rr.com /ravon/ssi.htm (1004 words)

	Simple Circuit Doubles Input Frequency - Maxim/Dallas
		A simple circuit consisting of a comparator and an exclusive-OR gate is sufficient to double the frequency of a reference signal.
		If the input is low for a long time, pin 4 of the XOR gate is low but pin 5 is high, due to signal inversion by the comparator.
		If the pin-4 input is now driven high, the XOR gate responds immediately by driving its output low.
	www.maxim-ic.com /appnotes.cfm/appnote_number/3327 (476 words)

	What Is...a logic gate (a definition)
		In most logic gates, the low state is approximately zero volts (0 V), while the high state is approximately five volts positive (+5 V).
		In theory, there is no limit to the number of gates that can be arrayed together in a single device.
		But in practice, there is a limit to the number of gates that can be packed into a given physical space.
	cs-people.bu.edu /dbuzan/cs101/logicgat.htm (430 words)

	XOR genetic logic gate (via CobWeb/3.1 planetlab2.cs.unc.edu) (Site not responding. Last check: 2007-10-08)
		If the external input of the XOR gate is set to a low state, the system will function as a repressilator.
		The XOR consists of 2 ‘branches.’ Within each branch a coding region for the cI protein is flanked by an antisense element.
		If the XOR gate works as expected, another area for future research is to use alternate promoters in the XOR gate that would allow its insertion into the original repressilator.
	biobricks.ai.mit.edu.cob-web.org:8888 /IAP_Projects/N-Synch/index.htm (1876 words)

	OLPS Examples (Site not responding. Last check: 2007-10-08)
		The normal operation of the gates is easy to specify, e.g.
		We assume that a broken gate may have a fixed output, whatever its inputs.
		and a specification of the behavior of the various gate types when they are stuck.
	tinf2.vub.ac.be /olp/examples.html (312 words)

	CMOS transmission-gate XOR gate
		The first stage of the circuit consists of a basic static inverter, which generates the inverse of input A. Note that the inverse of A is connected to the gate of the transmission-gate n-channel transistor, while A is connected to the gate of the p-channel transistor.
		Therefore, the transmission gate is conducting when A is low, and passes the value of B. This effectively realizes the (!A & B) term of the standard disjunctive expansion of the XOR function.
		Obviously, the two transistors in the center of the schematics form an inverter that calculates !B, and whose output is connected to the output of the XOR gate.
	tech-www.informatik.uni-hamburg.de /applets/hades/webdemos/05-switched/40-cmos/xor-tgate.html (492 words)

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