| | TechOnLine - New Configurable Processor Core has 350 MHz Worst-Case Performance (Site not responding. Last check: 2007-10-24) |
 | | As with other Xtensa products, the Xtensa V is a configurable and extensible core, with designer changes to extend the Xtensa processor hardware, such as adding instructions, registers, processor state and custom execution units, automatically reflected in the entire development-software tool chain. |
 | | Tensilica has also implemented an Incoming Request feature for the Xtensa processor interface (PIF) that lets Xtensa simultaneously execute instructions and handle read/writes to the processor's local data memory from external agents such as DMA engines or other tightly coupled processors. |
 | | Designers extend the Xtensa processor by describing new instructions, registers, state variables and complex execution units using the Tensilica Instruction Extension (TIE) language. |
| www.techonline.com /community/tech_topic/csoc/news/21191 (622 words) |